Design of Synthesizable, Retimed Digital Filters Using FPGA Based Path Solvers with MCM Approach: Comparison and CAD Tool

Table 2

Comparison of adders for delay, power, and area.

Type of	Delay in ns			Power in mW			Number of LUTs
adder	32 bit	16 bit	8 bit	32 bit	16 bit	8 bit	32 bit	16 bit	8 bit
Ling	8.854	15.24	20.21	6	9	18	23	53	107
BrentKung	10.4	18.39	25.83	4	6	9	15	30	63
Ripple	12.12	20.63	37.6	2	7	14	9	18	36