Design of Synthesizable, Retimed Digital Filters Using FPGA Based Path Solvers with MCM Approach: Comparison and CAD Tool

Table 5

Comparison results of different adder/multiplier combinations for digital filters.

Filter block	Adder/multiplier combinations	Before retiming			After retiming
		Number of LUTs	Max. operating freq in MHz	Power in mw	Number of LUTs	Max. operating freq in MHz	Power in mw
IIR-10	Brentkung Adder/Array Multiplier	2222	62.526	99	2411	76.977	89
	Ling Adder/Vedic Multiplier	2214	69.702	112	2193	95.381	94
	Ripple carry Adder/Booth Multiplier	2146	50.861	114	1809	65.248	95
FIR-10	Brentkung Adder/Array Multiplier	1736	62.526	94	1811	99.43	85
	Ling Adder/Vedic Multiplier	2162	72.493	111	2271	100.72	95
	Ripple carry Adder/Booth Multiplier	1637	52.302	105	1615	71.345	87