Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics

<div>Cascaded multiplexer schemes. (a) MEN-two-input cascaded Mux, (b) MEI-inverting equivalent.</div>

VLSI Design

Figure 6: Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics 