Design of Smart Power-Saving Architecture for Network on Chip

Algorithm 5

SPS algorithm.

SPS Algorithm

Input: system clock, channel packet, arbiter signal and reset.

Output: VCs clock

(1)   VC_group is VCs group of 4 direction port

(2)   VC_flag includes full flag and empty flag

(3)   Initial VCs clock and access VCs count and stage flag

(4)   follow LCR to arrangement all slots priority;

(5)    is VCs clock of each VC_group //where

(6)   Example VC_group = East port

(7)   initial = 0; //where

(8)   while (virtual channel be write) do

(9)  if (VC_flag = empty)

(10)   = system clock}

(11)   If (VC_flag = full flag)

(12)   = 0 and = system clock}

(13) end while

(14) while (virtual channel be read) do

(15)  if (empty flag = 1)

(16)   = 0}

(17) end while