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VLSI Design
Volume 2014, Article ID 534587, 15 pages
http://dx.doi.org/10.1155/2014/534587
Research Article

High-Efficient Circuits for Ternary Addition

1Department of Computer Engineering, Islamic Azad University, Shahr-e-Qods Branch, Tehran 37541-374, Iran
2Faculty of Electrical and Computer Engineering, Shahid Beheshti University, G.C., Tehran 1983963113, Iran
3Department of Electrical and Computer Engineering, Center for Pervasive Communications and Computing (CPCC), University of California, Irvine, CA 92697, USA

Received 12 May 2014; Revised 3 August 2014; Accepted 9 August 2014; Published 1 September 2014

Academic Editor: Mohamed Masmoudi

Copyright © 2014 Reza Faghih Mirzaee et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [10 citations]

The following is the list of published articles that have cited the current article.

  • Siwar Ben Haj Hassine, Mehdi Jemai, and Bouraoui Ouni, “Design and FPGA implementation of ternary hardware IP core for square root function,” 2017 International Conference on Engineering & MIS (ICEMIS), pp. 1–6, . View at Publisher · View at Google Scholar
  • Shirin Rezaie, Keivan Navi, Omid Hashemipour, and Reza Faghih Mirzaee, “From static ternary adders to high-performance race-free dynamic ones,” The Journal of Engineering, vol. 1, no. 1, 2009. View at Publisher · View at Google Scholar
  • Keivan Navi, Masoomeh Jasemi, Nader Bagherzadeh, and Reza Faghih Mirzaee, “Voltage mirror circuit by carbon nanotube field effect transistors for mirroring dynamic random access memories in multiple-valued logic and fuzzy logic,” IET Circuits, Devices & Systems, vol. 9, no. 5, pp. 343–352, 2015. View at Publisher · View at Google Scholar
  • Mona Moradi, Reza Faghih Mirzaee, and Keivan Navi, “New Current-Mode Integrated Ternary Min/Max Circuits without Constant Independent Current Sources,” Journal of Electrical and Computer Engineering, vol. 2015, pp. 1–11, 2015. View at Publisher · View at Google Scholar
  • Mahya Sam Daliri, Reza Faghih Mirzaee, Keivan Navi, and Nader Bagherzadeh, “Ternary cyclic redundancy check by a new hardware-friendly ternary operator,” Microelectronics Journal, vol. 54, pp. 126–137, 2016. View at Publisher · View at Google Scholar
  • Mona Moradi, Reza Faghih Mirzaee, and Keivan Navi, “New current-mode multipliers by CNTFET-based n-valued binary converters,” IEICE Transactions on Electronics, vol. E99C, no. 1, pp. 100–107, 2016. View at Publisher · View at Google Scholar
  • Mahya Sam Daliri, Reza Faghih Mirzaee, Keivan Navi, and Nader Bagherzadeh, “High-Performance Ternary Operators for Scrambling,” Integration, the VLSI Journal, 2017. View at Publisher · View at Google Scholar
  • Reza Faghih Mirzaee, and Akram Reza, “High-performance ternary (4:2) compressor based on capacitive threshold logic,” International Journal of Electronics and Telecommunications, vol. 63, no. 4, pp. 355–361, 2017. View at Publisher · View at Google Scholar
  • Srinivas, Chetan Vudadha, and Sai Phaneendra Parlapalli, “Energy efficient design of CNFET-based multi-digit ternary adders,” Microelectronics Journal, vol. 75, pp. 75–86, 2018. View at Publisher · View at Google Scholar
  • Chetan Vudadha, Srinivasan Rajagopalan, Aditya Dusi, P. Sai Phaneendra, and M. B. Srinivas, “Encoder-Based Optimization of CNFET-Based Ternary Logic Circuits,” IEEE Transactions on Nanotechnology, vol. 17, no. 2, pp. 299–310, 2018. View at Publisher · View at Google Scholar