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VLSI Design
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2014
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Article
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Tab 1
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Research Article
A Self-Reconfigurable Platform for the Implementation of 2D Filterbanks with Real and Complex-Valued Inputs, Outputs, and Filter Coefficients
Table 1
Largest output format and delay for the 1D filters.
Mode
Largest output format
rIrH, rIcH, cIrH
cIcH
Mode
REG_LEVELS
: I/O delay (in cycles)
rIrH, rIcH, cIrH
cIcH