Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic

<table>Power consumption for a 64-bit DCVSL full adder. (a) No HT, (b) HT on the 49th 1-bit full adder carry in port, and (c) HT on the 2nd 1-bit full adder carry in port.</table>

VLSI Design

fig5

Figure 5

Figure 5: Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic 