Efficient Hardware Trojan Detection with Differential Cascade Voltage Switch Logic

Table 4

Power consumption for two 64-bit full adders and HT insertions.

Unit under test		Dynamic power (mW)	Leakage power (nW)
CMOS-based 64-bit full adder	Adder	24.6	65.78
	HT-1	0.444	0.419
	HT-2	0.942	1.243
	HT-3	1.028	2.583
DCVSL-based 64-bit full adder	Adder	8.002	47.50
	HT-1	0.566	0.328
	HT-2	0.892	0.993
	HT-3	1.544	2.465