On-Chip Power Minimization Using Serialization-Widening with Frequent Value Encoding

<table class="table-group" id="tab6"><tr><td><table class="table"><tr><td class="thead-hr" colspan="2"><hr/></td></tr><tr class="thead"><td align="left">Name</td><td align="center">Abbreviation</td></tr><tr><td class="thead-hr" colspan="2"><hr/></td></tr><tr><td align="left">Bus-invert coding</td><td align="center">bi</td></tr><tr><td align="left">Transition signaling</td><td align="center">xor</td></tr><tr><td align="left">Frequent value encoding with one hot-code</td><td align="center">Fv</td></tr><tr><td align="left">Frequent value encoding with two hot-code</td><td align="center">fv2</td></tr><tr><td align="left">TUBE with one hot-code</td><td align="center">Tube</td></tr><tr><td align="left">TUBE with two hot-code</td><td align="center">tube2</td></tr><tr class="table-tr"><td colspan="2"><hr class="tbody-hr"/></td></tr></table></td></tr></table>

Listing of different encoding techniques implemented in this experiment.

VLSI Design

tab6

Table 6

Table 6: On-Chip Power Minimization Using Serialization-Widening with Frequent Value Encoding 