The Design of Low Noise Amplifiers in Deep Submicron CMOS Processes: A Convex Optimization Approach

<div>(a) Variation of minimal noise figure with different input quality factors <svg height="10.7866pt" id="M268" style="vertical-align:-2.150701pt" version="1.1" viewbox="-0.0498162 -8.6359 9.52083 10.7866" width="9.52083pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M699 368C699 549 574 666 407 666C186 666 23 488 23 277C23 113 129 -3 288 -13L307 -26C431 -111 501 -139 533 -147C559 -154 613 -163 658 -164L666 -141C597 -111 507 -66 430 -11L416 -1C580 42 699 190 699 368ZM601 371C601 227 518 54 381 22L354 40L278 24C175 47 120 145 120 269C120 451 235 631 398 631C540 631 601 521 601 371Z" id="g113-82"></path><glyph.data ascent="3473" descent="-2876" horiz-adv-x="722" vert-adv-y="722"></glyph.data></g></svg> and (b) variation of the optimal width with different quality factors.</div>

VLSI Design

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Figure 9

Figure 9: The Design of Low Noise Amplifiers in Deep Submicron CMOS Processes: A Convex Optimization Approach 