A Discrete Event System Approach to Online Testing of Speed Independent Circuits

<div>DES model for circuit with <svg height="11.6608pt" id="M353" style="vertical-align:-3.32502pt" version="1.1" viewbox="-0.0498162 -8.33578 14.2445 11.6608" width="14.2445pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M573 302C573 402 527 451 414 451C386 451 343 446 313 437L330 513L320 522C295 508 261 484 243 463L230 415C194 400 159 383 126 359L131 330C159 344 187 357 222 368L109 -147C96 -204 80 -214 18 -223L13 -255L256 -244L259 -212L236 -210C184 -205 180 -195 191 -141L219 -1C240 -10 268 -12 284 -12C352 4 431 48 484 104C543 166 573 240 573 302ZM481 290C481 165 381 37 305 37C280 37 249 56 235 71L302 395C328 399 353 402 372 402C427 402 481 378 481 290Z" id="g50-113"></path><glyph.data ascent="3443" descent="-2856" horiz-adv-x="597" vert-adv-y="597"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,7.762,0)"><path d="M389 0V32C297 38 291 46 291 118V635C234 613 175 595 109 583V556L161 554C203 552 207 547 207 497V118C207 46 201 38 110 32V0H389Z" id="g50-50"></path><glyph.data ascent="3443" descent="-2856" horiz-adv-x="487" vert-adv-y="487"></glyph.data></g></svg> stuck-on fault in C1 (STGs of Figure <a href="../fig5/">5</a>).</div>

VLSI Design

fig11

Figure 11

Figure 11: A Discrete Event System Approach to Online Testing of Speed Independent Circuits 