A Discrete Event System Approach to Online Testing of Speed Independent Circuits

<div>STG level model of stuck-on fault <svg height="8.54217pt" id="M170" style="vertical-align:-0.2063894pt" version="1.1" viewbox="-0.0498162 -8.33578 13.1353 8.54217" width="13.1353pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M504 89L488 119C453 85 428 69 416 69C408 69 405 75 412 102L462 304C492 438 460 451 436 451S388 441 356 423C311 397 229 336 170 256H168L189 340C208 418 200 451 177 451C144 451 82 413 24 352L40 322C65 345 98 369 108 369C114 369 119 363 112 335L28 -3L36 -12C54 -3 83 4 112 10C125 73 138 122 153 174C205 258 328 382 376 382C395 382 399 369 384 305L330 93C312 25 323 -12 351 -12C378 -12 439 21 504 89Z" id="g50-111"></path><glyph.data ascent="3443" descent="-2856" horiz-adv-x="512" vert-adv-y="512"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,6.656,0)"><path d="M414 144C384 79 371 75 317 75H135L276 221C367 316 408 376 408 465C408 570 327 635 237 635C179 635 131 609 100 575L42 494L67 471C94 510 138 565 205 565C277 565 321 517 321 435C321 348 258 270 195 195C146 137 88 81 33 26V0H411C423 44 433 88 446 135L414 144Z" id="g50-51"></path><glyph.data ascent="3443" descent="-2856" horiz-adv-x="487" vert-adv-y="487"></glyph.data></g></svg> of C1 [<a href="/journals/vlsi/2015/651785/#B20">22</a>].</div>

VLSI Design

fig6

Figure 6

Figure 6: A Discrete Event System Approach to Online Testing of Speed Independent Circuits 