Journals
Publish with us
Publishing partnerships
About us
Blog
VLSI Design
Table of Contents
Special Issues
VLSI Design
/
2016
/
Article
/
Tab 1
/
Research Article
A Low Complexity All-Digital Background Calibration Technique for Time-Interleaved ADCs
Table 1
Hardware comparison of the traditional filter and the improved filter.
Channel
The traditional scheme [
13
]
The proposed scheme
Channels of TIADC
2
4
8
2
4
8
Adder units
30
90
210
30
40
70
Multiplier units
35
105
245
35
45
75