Unified and Modular Modeling and Functional Verification Framework of Real-Time Image Signal Processors

Table 1

Challenges of previous verification framework.

Factors	Description
Reusability	Different verification languages at unit level (Specman(e)/Verilog) and system level (C/C++) verification framework.; Different verification methodologies both horizontally (across projects) and vertically (unit to system level verification).
Reproducibility	Significant time was spent in reproducing the issue reported at SoC level at IP/subsystem level.