Research Article

Unified and Modular Modeling and Functional Verification Framework of Real-Time Image Signal Processors

Table 2

Experimentation results.

Comparison featuresPrevious frameworkThe proposed frameworkDescription

Product verification time (in weeks) of one ISP IP/SoCIP: ~4 weeks
SoC: ~12 weeks
IP: ~2 weeks
System: ~6-7 weeks
(verification productivity is increased by ~50% percent)
Reusability. The proposed verification framework can be reused both vertically (unit level to system level) and horizontally (across different projects).
Automatic Checkers. Development and usage of automatic checkers (assertions and scoreboard) helped to automatically find bugs while running simulations. Formal tools were really helpful to find real complex bugs/problems.
Automation. Automatic generation of verification framework files using IP-XACT flow helped us to generate thousands of lines of code of verification environment in a very short time.

Verification cost (in our case)~500k dollars~400k dollars (~20% cost reduction)License Cost Saving. UVM is open standard supported by multiple vendor tools. Thus, there is no need to pay extra license cost for one vendor specific solution.
Specman tool cost for the old eRM methodology was ~4000/per license/year. Source: ST license cost data sheet.
Minimum 40,000 license cost saving per year (10 licenses × 4000).
Man-Hour Saving. Automatic development of verification environment and reuse of verification components helped to save the man-hour cost. Minimum 60,000 manpower cost saving per year.

Quality of the designs (number of bugs)15–20 functional bugs/problems per project3-4 functional bugs/problems per project (~75–80% improvement)Automatic Checkers. Development and usage of automatic checkers (assertions and scoreboard) helped to automatically find bugs while running simulations. Formal tools were really helpful to find real complex bugs/problems.
Randomization, coverage-driven approach, and other features of verification framework helped to generate/analyze complex corner scenarios which resulted in resolving corner bugs.
Interfacing issues and many corner case bugs are identified and resolved.