FuMicro: A Fused Microarchitecture Design Integrating In-Order Superscalar and VLIW

Table 5

ASM code example. (a) is a ASM code section run under superscalar mode. (b) is the corresponding VLIW code.

(a)

Cycle	Number	Instruction		Function unit
1	1	mov	r7, r7, asr #8	A
	2	mov	r2, r2, as1 #11	A
2	3	add	r2, r2, #128	A
3	4	add	1r, fp, r2	A
	5	rsb	fp, fp, r2	A
4	6	ldr	r2, [sl, r5]	L
	7	add	r5, 1r, r4	A
5	8	add	r0, fp, r6	A
	9	rsb	r4, r4, lr	A
6	10	mul	r6, r6, fp	M
	11	mul	ip, r9, r4	M
7	12	add	sl, r8, r5	A
	13	rsb	r9, r9, r4	A
8	14	add	r2, r0, rl	A
	15	add	1r, r6, r7	A
9	16	rsb	r8, r8, r5	A
	17	rsb	rl, rl, r0	A
10	18	rsb	r6, r7, r6	A
	19	ldr	r4, [sp, #12]	L

(b)

Cycle	Number	Instruction		Function unit
1	1	mov	r7, r7, asr #8	A
	2	mov	r2, r2, asl #11	A
	6	ldr	r2, [sl, r5]	L
2	3	add	r2, r2, #128	A
3	4	add	lr, fp, r2	A
	5	rsb	fp, fp, r2	A
4	7	add	r5, 1r, r4	A
	8	add	r0, fp, r6	A
	9	rsb	r4, r4, lr	A
	10	mul	r6, r6, fp	M
	19	ldr	r4, [sp, #12]	L
5	12	add	sl, r8, r5	A
	13	rsb	r9, r9, r4	A
	14	add	r2, r0, rl	A
	11	mul	ip, r9, r4	M
6	15	add	lr, r6, r7	A
	16	rsb	r8, r8, r5	A
	17	rsb	rl, rl, r0	A
	18	rsb	r6, r7, r6	A