VLSI Design

VLSI Design / 2016 / Article / Tab 7

Research Article

An Efficient Reconfigurable Architecture for Fingerprint Recognition

Table 7

Comparison of area and execution time of existing method with proposed method on FPGA.

AuthorBoardSlices (% utilization) Total execution time

Lopez and Canto [46]Spartan 3 XC3S20003507/20480 (17.12%)987.8 ms at 40 MHz
Fons et al. [47]Altera ARM + FPGA
29327/38400 (76.37%) 955.842 ms
Conti et al. [48]Xilinx Virtex II XC2V300012,863/14,336 (89.72%)183.32 ms at 22.5 MHz
Proposed methodXilinx Virtex
8776/19200 (45.70%)1.644 ms at 68 MHz

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