Table of Contents
VLSI Design
Volume 2018, Article ID 6153274, 13 pages
Research Article

First Steps in Creating Online Testable Reversible Sequential Circuits

1Department of Computer Science and Engineering, East West University, Aftabnagar, Dhaka 1212, Bangladesh
2Department of Mathematics and Computer Science, University of Lethbridge, Lethbridge, AB, Canada T1K 3M4

Correspondence should be addressed to Jacqueline E. Rice; ac.htelu@ecir.j

Received 2 May 2017; Accepted 6 December 2017; Published 14 January 2018

Academic Editor: Marcelo Lubaszewski

Copyright © 2018 Mozammel H. A. Khan and Jacqueline E. Rice. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [2 citations]

The following is the list of published articles that have cited the current article.

  • A. Kamaraj, P. Marichamy, J. Senthil Kumar, S. Selva Nidhyananthan, and C. Kalyana Sundaram, “Design of Space-Efficient Nano Router in Reversible Logic with Multilayer Architecture,” Design and Testing of Reversible Logic, vol. 577, pp. 233–250, 2019. View at Publisher · View at Google Scholar
  • Zeinab Kalantari, Mohammad Eshghi, Majid Mohammadi, and Somayeh Jassbi, “Low-cost and compact design method for reversible sequential circuits,” The Journal of Supercomputing, 2019. View at Publisher · View at Google Scholar