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VLSI Design
Volume 2018, Article ID 9269157, 7 pages
Research Article

Efficient Nonrecursive Bit-Parallel Karatsuba Multiplier for a Special Class of Trinomials

Department of Computer Science and Technology, Xinyang Normal University, Nanhu Road 237, Xinyang, Henan, China

Correspondence should be addressed to Yin Li; moc.liamg@ilgnayiefnuy

Received 15 August 2017; Revised 1 December 2017; Accepted 10 December 2017; Published 11 January 2018

Academic Editor: Junqing Sun

Copyright © 2018 Yin Li et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Recently, we present a novel Mastrovito form of nonrecursive Karatsuba multiplier for all trinomials. Specifically, we found that related Mastrovito matrix is very simple for equally spaced trinomial (EST) combined with classic Karatsuba algorithm (KA), which leads to a highly efficient Karatsuba multiplier. In this paper, we consider a new special class of irreducible trinomial, namely, . Based on a three-term KA and shifted polynomial basis (SPB), a novel bit-parallel multiplier is derived with better space and time complexity. As a main contribution, the proposed multiplier costs about circuit gates of the fastest multipliers, while its time delay matches our former result. To the best of our knowledge, this is the first time that the space complexity bound is reached without increasing the gate delay.