An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick

Table 6

Hardware accelerator implementation on Intel FPGAs.

FPGA family	Comb. elem.	Comb. elem. (%)	Seq. elem.	Seq. elem. (%)	BRAM	BRAM (%)	DSP	DSP (%)
Arria 10 GX	23722	23	296	<1	344	46	323	39
Stratix V GS	25532	18	2851	<1	344	36	323	31
Stratix V GX	23370	7	1860	<1	344	13	323	92
Stratix V E	23099	7	1843	<1	344	13	323	92
Cyclone V	24111	21	2911	<1	392	32	323	94