Review Article

FinFETs: From Devices to Architectures

Figure 18

Schematic diagrams of (a) SG INV, (b) LP INV, (c) IGn INV, and (d) IGp INV [49].
365689.fig.0018a
(a)
365689.fig.0018b
(b)
365689.fig.0018c
(c)
365689.fig.0018d
(d)