Table of Contents
Advances in Electronics
Volume 2015, Article ID 202131, 10 pages
Research Article

Reconfigurable CPLAG and Modified PFAL Adiabatic Logic Circuits

1Department of ECE, Mewar University, Rajasthan 312901, India
2Department of ECE, BVCOE, Paschim Vihar, New Delhi 110063, India
3SoE, CDAC Noida, Ministry of Communications and IT, Government of India, Noida, Uttar Pradesh 201307, India

Received 30 September 2014; Revised 25 December 2014; Accepted 25 December 2014

Academic Editor: Meiyong Liao

Copyright © 2015 Manoj Sharma and Arti Noor. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Manoj Sharma and Arti Noor, “Reconfigurable CPLAG and Modified PFAL Adiabatic Logic Circuits,” Advances in Electronics, vol. 2015, Article ID 202131, 10 pages, 2015.