Abstract

This paper presents multiphase sinusoidal oscillators (MSOs) using operational transresistance amplifier (OTRA) based all pass networks. Both even and odd phase oscillations of equal amplitudes which are equally spaced in phase can be produced using single all pass section per phase. The proposed MSOs provide voltage output and can readily be used for driving voltage input circuits without increasing component count. The effect of nonideality of OTRA on the circuit performance is also analysed. The functionality of the proposed circuit is verified through PSPICE simulations.

1. Introduction

Multiphase sinusoidal oscillators (MSO) provide multiple outputs of the same frequency, equally spaced in phase, and find extensive application in the field of communications, instrumentation, and power electronics. In communications MSO circuits are used in single-sideband generators, phase modulators, and quadrature mixers [1]. Selective voltmeters and vector generator are common applications of MSOs in the field of instrumentation [2]. In power electronics three-phase MSOs are frequently utilized in PWM converters [3] and inverters [4].

A large number of MSO realizations using various analog building blocks (ABB) [2, 525] are available in literature. These MSOs are based on a basic design philosophy of forming closed loop using    cascaded phase shifting networks thereby producing equally spaced phases. For phase shifting either first-order low pass networks (LPNs) [57, 921, 24, 25] or first-order all pass networks (APNs) [2, 8, 22, 23] are used. These reported structures provide either voltage [516] or current [2, 1724] outputs.

The MSOs of [58] are realized using operational amplifiers (op-amps). However due to constant gain-bandwidth product and lower slew rate of the op-amps, their high frequency operations are limited. Additionally the active implementations of [5, 6] lack tunability as these structures make use of the op-amp parasitic capacitance. The current feedback operational amplifier (CFOA) based MSO structure [9] is capable of producing high frequencies but requires an accessible compensation terminal of a CFOA. The MSOs of [10, 11] are OTA based electronically tunable structures; however, they provide voltage output at high impedance making a buffer necessary to drive the voltage input circuits. In addition, for both the structures the output voltage is temperature sensitive too. The MSO configurations presented in [1215] are CC based designs and provide voltage output at high impedance. Further the MSO of [14], being active structure, lacks tunability. Three topologies of OTRA based MSOs are proposed in [16] and are designed using LPNs. The structures proposed in [2, 1725] provide current outputs which need to be converted back to voltage for circuits requiring voltage inputs, which would considerably increase the component count. A detailed comparison of these structures is given in Table 1 which suggests that OTRA based MSO is the most suitable choice for voltage output.

In this paper authors aim at presenting OTRA based MSO, designed using APNs. The proposed circuit utilizes    APNs to produce phase oscillations of equal amplitudes with a phase difference of ()°. The APN can produce a phase shift up to 180° as against a maximum of 90° produced by LPN. As a result the APN based scheme can be used to implement an even phase system for also whereas is the minimum for the systems designed using LPNs [8].

2. Circuit Description

In this section the generalized APN based MSO scheme [8] is described first which is followed by the design adaption using OTRA.

2.1. The APN Based MSO Design Scheme

The APN based MSO structure consists of cascaded first-order APN blocks. The output of the th stage is fed back to the input of the first stage thus forming a closed loop as shown in Figure 1(a). The output of th stage is fed back directly for odd phase system whereas for even phase system it is inverted, for sustained oscillations. In case of even phased system the structure can be modified for obtaining even phased oscillations by replacing APN with inverters as shown in Figure 1(b).

The transfer function of each APN block is given by where represents the gain and time constant determines the corner frequency of the APN. The phase of each APN block is computed to be Thus an APN can introduce signal phase lag from 0 to 180° as frequency varies from zero to infinity. From Figure 1 the open loop gain can be expressed as The Barkhausen criterion [26] for sustained oscillations at a frequency can be expressed by Since , (4) results in condition of oscillation (CO) as Substituting from (2) in (5) total phase shift of the loop can be computed as Equation (7) will converge only for values of such that . This results in frequency of oscillation (FO) as The spacing between different phases is given by Thus the circuit gives rise to equally spaced oscillations having a phase difference of ()°.

2.2. The OTRA Based MSO Implementation

The OTRA is a high gain, current input voltage output ABB. The circuit symbol of OTRA is shown in Figure 2 and the port characteristics in matrix form are given by (10), where is transresistance gain of OTRA. For ideal operations the of OTRA approaches infinity and forces the input currents to be equal. Thus OTRA must be used in a negative feedback configuration [25, 27]: The MSO scheme outlined in Section 2.1 can be implemented using OTRA based first-order all pass sections. The OTRA based APN proposed in [27] and shown in Figure 3 is used for MSO implementation.

The transfer function of the APN can be written as where and the phase relation is expressed as The OTRA based odd and even phased MSO structures are shown in Figures 4(a) and 4(b), respectively. The loop gain can be written as CO and FO can be expressed as

3. Nonideality Analysis

Ideally the transresistance gain is assumed to approach infinity. However, practically is a frequency dependent finite value. Considering a single pole model for the transresistance gain, can be expressed as For high frequency applications the transresistance gain reduces to is known as parasitic capacitance of OTRA. Taking the effect of into account (11) modifies to Thus the of OTRA results in introduction of another pole having pole frequency . However with the value of being small (typically 5 pF) the parasitic pole frequency would be far off from the operating frequency of the APN and would not affect the MSO operation.

4. Simulation Results

The proposed circuits are simulated using PSPICE to validate the theoretical predictions. The CMOS realization of OTRA presented in [28] and reproduced in Figure 5 is used for simulation. The output of the MSO of Figure 4(a) for , with component values  KΩ,  KΩ, and  nF, is depicted in Figure 6. The steady state output is shown in Figure 6(a) while the frequency spectrum is depicted in Figure 6(b). The simulated frequency of oscillations is observed to be 1 MHz against the calculated value of 1.1 MHz.

Simulation results for , with component values  KΩ,  KΩ, and  nF, are depicted in Figure 7. The simulated frequency is found to be 61.69 KHz while the theoretical calculation yields an FO of 63.69 KHz.

It may be observed from (8) that the FO can be varied either through or by changing . Variation of FO with respect to while keeping  nF has been depicted in Figure 8(a) whereas tuning with is shown in Figure 8(b) with  KΩ. It shows that the simulated values closely follow the theoretically calculated values.

5. Conclusion

In this work OTRA based MSO circuits, designed using first-order all pass networks, are presented. The proposed structures produce “” phase oscillations of equal amplitudes which are equally spaced in phase. These circuits provide voltage output at low impedance and thus can readily be used to drive voltage input circuits without increasing component count. The proposed circuits are very accurate in providing the desired phase shift. The workability of the circuit has been demonstrated through PSPICE simulations.

Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.