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Active and Passive Electronic Components
Volume 19, Issue 2, Pages 73-89

Analysis and Modeling of Depletion-Mode MOS Transistors

Dept. of Electrical Eng., I.I.T., New Delhi 110016, India

Received 27 May 1995; Accepted 20 July 1995

Copyright © 1996 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Depletion mode MOSFETs are widely used in MOS—LSI/VLSI circuits as load elements. The main advantages offered by these devices are:

Higher packaging density,

Improved performance,

Reduced power consumption, etc.

Masuhara et. al (1972) developed a model for analysis of this device as an enhancement mode MOSFET. The model was adequate for analysis of lightly-doped, shallow-implanted channels. Subsequently, a more rigorous analysis was put forth by HAKEN for larger doping and deep channels. The analysis made by Edward and Marr did not simplify the non-linear relationship between surface depletion region width and gate voltage. The model also did not account for the transconductance of the device in the three operating regimes.

In this paper, the various models are briefly examined, and an attempt has been made for extraction of various parameters for obtaining the DC characteristics of these devices.