Abstract
The loss power density associated with the tunneling current in a typical MOS cell with a floating gate is evaluated for high electric-field strengths in the oxide layer. Furthermore, problems related to oxide thickness are discussed.
Open Access
Some Considerations on Tunneling Losses in Field-Effect Devices for Low-Voltage Microcontrollers
Received08 Nov 1997
Accepted23 Jan 1998
Copyright
Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the
Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.