Gate Stack Engineering and Thermal Treatment on Electrical and Interfacial Properties of Ti/Pt/HfO<sub>2</sub>/InAs <i>p</i>MOS Capacitors

<table>Energy dispersive X-ray spectroscopy (EDX) analysis obtained from various locations of Ti/InP/InAs MOS structure. EDX analysis reveals that an interfacial <svg height="15.825" id="M16" style="vertical-align:-3.39066pt" version="1.1" viewbox="0 0 33.462502 15.825" width="33.462502" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
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<g transform="matrix(.012,0,0,-.012,26.125,15.613)"><path d="M536 404q0 -17 -13.5 -31.5t-26.5 -14.5q-8 0 -15 10q-11 14 -25 14q-22 0 -67 -50q-47 -52 -68 -82l37 -102q31 -88 55 -88t78 59l16 -23q-32 -48 -68.5 -78t-65.5 -30q-19 0 -37.5 20t-29.5 53l-41 116q-72 -106 -114.5 -147.5t-79.5 -41.5q-21 0 -34.5 14t-13.5 37
q0 16 13.5 31.5t28.5 15.5q12 0 17 -11q5 -10 25 -10q22 0 57.5 36t89.5 111l-40 108q-22 58 -36 58q-21 0 -67 -57l-19 20q81 107 125 107q17 0 30 -22t39 -88l22 -55q68 92 108.5 128.5t74.5 36.5q20 0 32.5 -14t12.5 -30z" id="x1D465"></path></g>
</svg> (<i>x</i> ~ 1.2) and Hf-rich oxide were formed after Ti deposition onto HfO<sub>2</sub>/InP/InAs structure.</table>

Active and Passive Electronic Components

fig2

Figure 2

Figure 2: Gate Stack Engineering and Thermal Treatment on Electrical and Interfacial Properties of Ti/Pt/HfO<sub>2</sub>/InAs <i>p</i>MOS Capacitors 

Active and Passive Electronic Components

Gate Stack Engineering and Thermal Treatment on Electrical and Interfacial Properties of Ti/Pt/HfO2/InAs pMOS Capacitors

Figure 2

Gate Stack Engineering and Thermal Treatment on Electrical and Interfacial Properties of Ti/Pt/HfO₂/InAs pMOS Capacitors