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Active and Passive Electronic Components
Volume 2013 (2013), Article ID 153157, 9 pages
Research Article

Potential and Quantum Threshold Voltage Modeling of Gate-All-Around Nanowire MOSFETs

1Pandian Saraswathi Yadav Engineering College, Sivagangai, India
2Thiagarajar Engineering College, Madurai, India
3St. Michael’s College of Engineering and Technology, Sivagangai, India

Received 21 March 2013; Revised 15 August 2013; Accepted 15 August 2013

Academic Editor: Gerard Ghibaudo

Copyright © 2013 M. Karthigai Pandian et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


An improved physics-based compact model for a symmetrically biased gate-all-around (GAA) silicon nanowire transistor is proposed. Short channel effects and quantum mechanical effects caused by the ultrathin silicon devices are considered in modelling the threshold voltage. Device geometrics play a very important role in multigate devices, and hence their impact on the threshold voltage is also analyzed by varying the height and width of silicon channel. The inversion charge and electrical potential distribution along the channel are expressed in their closed forms. The proposed model shows excellent accuracy with TCAD simulations of the device in the weak inversion regime.