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Active and Passive Electronic Components
Volume 2013 (2013), Article ID 801634, 10 pages
http://dx.doi.org/10.1155/2013/801634
Research Article

Modeling of the Channel Thickness Influence on Electrical Characteristics and Series Resistance in Gate-Recessed Nanoscale SOI MOSFETs

1Faculty of Engineering, Jerusalem College of Technology, 91160 Jerusalem, Israel
2Faculty of Engineering, Bar-Ilan University, 52900 Ramat Gan, Israel

Received 20 December 2012; Revised 8 May 2013; Accepted 8 May 2013

Academic Editor: Gerard Ghibaudo

Copyright © 2013 A. Karsenty and A. Chelly. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Ultrathin body (UTB) and nanoscale body (NSB) SOI-MOSFET devices, sharing a similar W/L but with a channel thickness of 46 nm and lower than 5 nm, respectively, were fabricated using a selective “gate-recessed” process on the same silicon wafer. Their current-voltage characteristics measured at room temperature were found to be surprisingly different by several orders of magnitude. We analyzed this result by considering the severe mobility degradation and the influence of a huge series resistance and found that the last one seems more coherent. Then the electrical characteristics of the NSB can be analytically derived by integrating a gate voltage-dependent drain source series resistance. In this paper, the influence of the channel thickness on the series resistance is reported for the first time. This influence is integrated to the analytical model in order to describe the trends of the saturation current with the channel thickness. This modeling approach may be useful to interpret anomalous electrical behavior of other nanodevices in which series resistance and/or mobility degradation is of a great concern.