Research Article

An Architecture of 2-Dimensional 4-Dot 2-Electron QCA Full Adder and Subtractor with Energy Dissipation Study

Table 7

Comparison of dissipated power by the proposed and existing circuits.

Design Sum_bath Avg_bath Sum_clk Avg_clk

Adderslayout in [22]3.52e-02
(Er: -3.08e-03)
3.20e-03
(Er: -2.80e-04)
-1.39e-02 -1.26e-03
layout in [23]2.16e-02
(Er: -1.93e-03)
1.97e-03
(Er: -1.75e-04)
8.60e-03 7.82e-04
layout in [28]3.00e-02
(Er: -2.87e-03)
2.73e-03
(Er: -2.61e-04)
-7.85e-03 -7.13e-04
Proposed layout2.31e-02
(Er: -2.38e-03)
2.10e-03
(Er: -2.16e-04)
1.19e-02 1.08e-03

Subtractorslayout in [25]7.46e-02
(Er: -7.27e-03)
6.78e-03
(Er: -6.61e-04)
-2.12e-02 -1.93e-03
layout in [26]2.28e-02
(Er: -2.26e-03)
2.07e-03
(Er: -2.05e-04)
2.26e-02 2.06e-03
layout in [29]4.91e-02
(Er: -3.80e-03)
4.46e-03
(Er: -3.45e-04)
-3.25e-02 -2.96e-03
layout in [30]6.35e-03
(Er: -6.97e-04)
5.77e-04
(Er: -6.33e-05)
1.63e-02 1.48e-03
Proposed layout2.30e-02
(Er: -2.37e-03)
2.09e-03
(Er: -2.16e-04)
7.65e-03 6.96e-04