BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits

Algorithm 3

The algorithm of subroutine 3 in the BDD-based extraction algorithm.

 Algorithm of Subroutine3:

 Input: Gsa: set of AND/NAND2 sub-graph from subroutine2;

 Input: G: node set of BDD from subroutine 1

 Output: Gsaoi: set of AOI/OAI sub-graph

 Output: Gsand3: set of AND/NAND31 sub-graph

1: for each gs in Gsa do

2:  v_j←root(gs)

3:  for each v_k in BDD do

4:   if low(v_k)=v_j OR high(v_k)=v_j then

5:    if v_k satisfy Theorem 4 case 1 then

6:     

10:     Gsa3←

11:    else if v_k satify Theorem 4 case2 then

12:     

13:     Gsaoi←

14:    end if

15:   end if

16:  end for

17: end for