Research Article

BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits

Table 1

Performance comparison of some example cells.

CellsT.CountDelay (ps)Power (μW)

CGIGCGIGCGIG

NAND425.65.111.85.5

NOR425.54.711.83.0

NAND3649.29.78.54.9

AOI647.77.315.65.9

OAI646.66.416.89.5

XOR1084.03.454.331.7