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Computational Intelligence and Neuroscience
Volume 2014, Article ID 740838, 11 pages
Research Article

Test Generation Algorithm for Fault Detection of Analog Circuits Based on Extreme Learning Machine

School of Automation Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China

Received 29 September 2014; Accepted 15 December 2014; Published 29 December 2014

Academic Editor: J. Alfredo Hernandez

Copyright © 2014 Jingyu Zhou et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


This paper proposes a novel test generation algorithm based on extreme learning machine (ELM), and such algorithm is cost-effective and low-risk for analog device under test (DUT). This method uses test patterns derived from the test generation algorithm to stimulate DUT, and then samples output responses of the DUT for fault classification and detection. The novel ELM-based test generation algorithm proposed in this paper contains mainly three aspects of innovation. Firstly, this algorithm saves time efficiently by classifying response space with ELM. Secondly, this algorithm can avoid reduced test precision efficiently in case of reduction of the number of impulse-response samples. Thirdly, a new process of test signal generator and a test structure in test generation algorithm are presented, and both of them are very simple. Finally, the abovementioned improvement and functioning are confirmed in experiments.