Hyperchaotic Chameleon: Fractional Order FPGA Implementation

<div>Bifurcation of NCS versus fractional order <svg height="9.39034pt" id="M230" style="vertical-align:-3.42943pt" version="1.1" viewbox="-0.0498162 -5.96091 6.50656 9.39034" width="6.50656pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M474 429L457 433C435 440 389 448 367 448C348 448 323 446 309 443C266 434 195 406 148 366C78 307 23 210 23 101C23 35 55 -12 92 -12C118 -12 146 1 196 35C247 70 311 130 346 173H348L281 -148C268 -211 256 -221 208 -229L191 -232L187 -257L433 -245L437 -219L411 -216C357 -210 350 -205 362 -140L427 207C447 315 461 381 474 429ZM387 387C379 337 363 262 355 236C318 180 201 57 142 57C126 57 112 81 112 128C112 205 150 321 220 376C244 395 280 403 312 403C345 403 370 396 387 387Z" id="g113-114"></path><glyph.data ascent="3473" descent="-2876" horiz-adv-x="491" vert-adv-y="491"></glyph.data></g></svg> (<svg height="10.8649pt" id="M231" style="vertical-align:-1.57657pt" version="1.1" viewbox="-0.0498162 -9.28833 62.5289 10.8649" width="62.5289pt" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"><g transform="matrix(.013,0,0,-0.013,0,0)"><path d="M483 97L471 123C436 91 401 65 392 65C388 65 384 74 390 106C414 239 444 378 457 429L455 433C444 433 429 436 416 439C392 444 368 448 344 448C281 448 204 415 152 376C71 315 23 205 23 103C23 21 57 -12 85 -12C114 -12 149 6 185 34C231 70 285 119 329 183H331L309 81C292 0 308 -12 326 -12C350 -12 421 24 483 97ZM374 387C370 363 356 291 345 261C315 193 181 50 139 50C124 50 110 71 110 118C110 224 153 331 218 379C238 394 271 402 301 402C329 402 359 394 374 387Z" id="g113-98"></path><glyph.data ascent="3473" descent="-2876" horiz-adv-x="506" vert-adv-y="506"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,10.212,0)"><path d="M535 323V373H52V323H535ZM535 138V188H52V138H535Z" id="g117-34"></path><glyph.data ascent="3473" descent="-2876" horiz-adv-x="587" vert-adv-y="587"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,21.475,0)"><path d="M241 635C89 635 35 457 35 312C35 153 89 -12 240 -12C390 -12 443 166 443 312C443 466 390 635 241 635ZM238 602C329 602 354 454 354 312C354 172 330 22 240 22C152 22 124 173 124 313S148 602 238 602Z" id="g113-49"></path><glyph.data ascent="3473" descent="-2876" horiz-adv-x="480" vert-adv-y="480"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,27.715,0)"><path d="M95 130C70 130 46 113 46 88C46 72 54 64 59 64C93 55 121 33 121 -3C121 -41 93 -68 44 -88L55 -117C117 -98 186 -56 186 22C186 91 131 130 95 130Z" id="g113-45"></path><glyph.data ascent="3473" descent="-2876" horiz-adv-x="228" vert-adv-y="228"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,35.037,0)"><path d="M452 333C452 398 425 448 375 448C329 448 235 404 140 292H138L229 683C233 701 234 712 225 712C208 712 149 686 66 677L64 652H97C135 652 140 651 129 598L38 167C23 96 29 57 44 33C60 7 98 -12 132 -12C169 -12 232 3 290 41C383 102 452 223 452 333ZM365 316C365 199 308 87 239 49C221 39 200 35 183 35C137 35 99 70 112 163C116 191 123 215 129 233C190 316 290 392 330 392C348 392 365 372 365 316Z" id="g113-99"></path><glyph.data ascent="3473" descent="-2876" horiz-adv-x="469" vert-adv-y="469"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,44.77,0)"><path d="M535 323V373H52V323H535ZM535 138V188H52V138H535Z" id="g117-34"></path><glyph.data ascent="3473" descent="-2876" horiz-adv-x="587" vert-adv-y="587"></glyph.data></g><g transform="matrix(.013,0,0,-0.013,56.033,0)"><path d="M241 635C89 635 35 457 35 312C35 153 89 -12 240 -12C390 -12 443 166 443 312C443 466 390 635 241 635ZM238 602C329 602 354 454 354 312C354 172 330 22 240 22C152 22 124 173 124 313S148 602 238 602Z" id="g113-49"></path><glyph.data ascent="3473" descent="-2876" horiz-adv-x="480" vert-adv-y="480"></glyph.data></g></svg>).</div>

Complexity

Hyperchaotic Chameleon: Fractional Order FPGA Implementation

Figure 16