Complexity

Volume 2017 (2017), Article ID 9696342, 12 pages

https://doi.org/10.1155/2017/9696342

## A Novel Graphical Technique for Combinational Logic Representation and Optimization

^{1}Chair of Embedded Intelligence for Health Care and Wellbeing, University of Augsburg, Augsburg, Germany^{2}Group on Language, Audio & Music (GLAM), Imperial College London, London, UK

Correspondence should be addressed to Vedhas Pandit

Received 5 June 2017; Revised 11 October 2017; Accepted 14 November 2017; Published 31 December 2017

Academic Editor: Michele Scarpiniti

Copyright © 2017 Vedhas Pandit and Björn Schuller. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

We present a new technique for defining, analysing, and simplifying digital functions, through hand-calculations, easily demonstrable therefore in the classrooms. It can be extended to represent discrete systems beyond the Boolean logic. The method is graphical in nature and provides complete ‘‘implementation-free” description of the logical functions, similar to binary decision diagrams (BDDs) and Karnaugh-maps (K-maps). Transforming a function into the proposed representations (also the inverse) is a very intuitive process, easy enough that a person can hand-calculate these transformations. The algorithmic nature allows for its computing-based implementations. Because the proposed technique effectively transforms a function into a scatter plot, it is possible to represent multiple functions simultaneously. Usability of the method, therefore, is constrained neither by the number of inputs of the function nor by its outputs in theory. This, being a new paradigm, offers a lot of scope for further research. Here, we put forward a few of the strategies invented so far for using the proposed representation for simplifying the logic functions. Finally, we present extensions of the method: one that extends its applicability to multivalued discrete systems beyond Boolean functions and the other that represents the variants in terms of the coordinate system in use.

#### 1. Introduction and Literature Overview

Combinational logic optimization is one of the first steps when designing any digital circuit. This practice helps chip designer save on number of transistors, chip area, and helps reduce logic delays and power requirements. It is no surprise therefore that many efforts have been made to develop fully functional, interactive programs for the industry even in the 80s, such as MIS [1] and SOCRATES [2] and the field has only grown ever since with the advent of many companies competing in this domain. In this section, we discuss various logic optimization methods. Advantages and drawbacks associated with each of these popular methods, especially the ones that offer graphical representation of a function or are simple enough for humans to hand-calculate, is the primary focus of this section. In view of the listed advantages and drawbacks, characteristic features of an ideal methodology are then presented.

A Karnaugh-map (K-map) [3, 4] is a graphical technique for combinational logic optimization, which offers a very intuitive way to hand-calculate the proposed graphical representation of a Boolean function and its reduction. Using different colour schemes, multiple output functions involving the same inputs can be represented on a single K-map. However, it is only ideal for a function where the number of inputs is less than five. To represent functions involving more than four variables, one of the proposed implementations splits the graph into subgraphs—each subgraph representing only four variables at a time [5]. Another extension of the K-maps does not require splitting the graph into smaller units to represent functions with more than four variables, but some of the variable inversions can no longer remain adjacent to each other [6]—like in the case of K-maps for four inputs.

A binary decision diagram (BDD) [7–10] is also a graphical method that is easy enough to implement and visualise. BDDs are often put to use as a data structure to both represent the Boolean functions and to perform the operations efficiently. Unlike K-maps, usability of this approach is not constrained by the number of inputs. Optimization is primarily about choosing the correct ordering of input variables and about reducing the number of “nodes” by merging equivalent nodes and by removing redundant ones. Diagram complexity depends a lot on the ordering of the input variables and the respectively applied decomposition type [7, 11], and it is not always easy to devise the correct order by mere visual inspection. This however, to a limited extent, is also a downside of the graphical approaches presented in this paper. As for BDDs, moreover, one cannot translate a given graphical representation back to its Boolean expression just by a quick visual skimming through—it is imperative to trace the entire paths starting from the output nodes back to the first input in order.

Typed decision graphs (TDGs) [12] offer reduction of BDDs into a graph with a lot fewer nodes and connections. The advantages and drawbacks of the method are therefore mostly similar to those of BDDs, including dependence of the size/complexity of the representation on the ordering of the variables. Also closely related to BDDs are graphical techniques called “implicit graph based method” [13–15] and signal transition graphs (STGs) [16].

The Quine–McCluskey algorithm [17–19] (or method of prime implicants) is functionally identical to Karnaugh mapping and is a deterministic way to check that the minimal form of a Boolean function has been reached. The tabular form makes it more efficient for use in computer algorithms, but, not being graphical, it is not as simple or as intuitive as Karnaugh-maps for use by the designer himself/herself. Petrick’s method (the branch-and-bound method) [20] is a technique for determining all minimum sum-of-products solutions from a prime implicant chart and could be looked upon as an extension to the Quine–McCluskey algorithm. The process gets tedious for a human for a large number of inputs and does not scale well on computers likewise. The Espresso algorithm [21] uses a radically different approach by applying heuristics, manipulating the “cubes” representing the product terms in the ON-, DC-, and OFF-covers iteratively, instead of expanding the minterms. Recently, a new paradigm has been proposed called “Majority-Inverter Graph” [22], which is a directed acyclic graph consisting of three-input majority nodes and direct/negated edges.

Keeping classroom education of Boolean functions at the focus, several methodologies [23–27] that are mostly nongraphical and can best be demonstrated with systems with only a limited number of inputs have been proposed, in addition to more generalised software implementations [28–32] not directly useful for demonstrating the concepts through easy hand-calculations. Karnaugh-maps—due to the method’s graphical nature—continue to be used as the first method to explain the optimization process in the switching theory textbooks [33] still today.

In the context of the comparison of the methods noted so far, we propose that the following are the desired characteristics of an ideal logic representation methodology:(i)It is not constrained by the number of inputs or outputs and can in theory handle an infinite number of inputs and outputs. That is to say, multiple output functions can be represented simultaneously.(ii)The optimization process should be intuitive; ideally visual inspection should be enough to establish input-output relationship. Or it should be based on a paradigm that is intuitive enough for a human to simply hand-calculate. Graphical methods like K-maps do offer that advantage.(iii)If it is graphical, an equivalent numerical method should exist, which can effectively be used as a data structure to optimally represent combinational logic through conventional programming.(iv)Translating a Boolean equation into the graphical representation (or vice versa) is a simple process.(v)Ordering of variables should play no role in the complexity of the representation.

The proposed technique satisfies all of the desired characteristics listed, except the very last one. Ordering of variables contributes to the ease with which a human can optimize a function without using any computing resources.

#### 2. Definitions

(i)The logical operators/symbols “”, “+”, “”, “”, and “” denote the logical negation, OR, AND, XOR, and XNOR operations, respectively.(ii)The symbols “” and “” denote the logical AND and OR operations of the variables in iteration, respectively.(iii) is a set of inputs to the combinational logic block under consideration.(iv) denotes an empty set.(v)SOP = sum of products.(vi)POS = product of sums.

#### 3. Proposed Technique (Pandit-Plot)

Every Boolean equation is represented by a scatter plot in two dimensions. In effect, in its simplest version, corresponding to four quadrants, four Boolean expressions can simultaneously be represented and optimized on a single plane. By using different markers, one for each function, multiple logic functions may be represented in a single plane and subsequently reduced.

##### 3.1. Coordinate System and Input Correspondence

Every integer coordinate “” corresponds to an input combination such thatOne axis (say -axis) represents a condition where the designated inputs are all (also called or logic level ), while the other represents a case where those inputs are all (also called or logic level ). There is, therefore, a one-to-one correspondence between the set of all of combinations of the inputs and the set of points on the plane with integer coordinates. With such a representation system in place, every point on the plot with integer coordinates signifies a single product (in a SOP representation) or a single sum (in a POS representation). As an example, for a system with three inputs (), the template of the plot that is restricted to the first quadrant () will be as shown in Figure 1.