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2019
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Article
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Tab 2
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Research Article
Analysis and FPGA Realization of a Novel 5D Hyperchaotic Four-Wing Memristive System, Active Control Synchronization, and Secure Communication Application
Table 2
Xilinx ZYNQ-XC7Z020 FPGA chip hardware usage statistics of the 5D HFWMS.
Resource
Used
Available
Utilization
Slice register
26893
106400
25
Number of slice LUTs
23173
53200
43
Number of bonded IOBs
30
125
24
Number of BUFG
1
32
3
Max. clock frequency
147.863 MHz
—
—
Latency
13.53 ns
—
—
Throughput
59.15 Mbit/s
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—
Power
0.275 W
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—