Complexity

Complexity / 2020 / Article

Research Article | Open Access

Volume 2020 |Article ID 8742308 | https://doi.org/10.1155/2020/8742308

Suxia Jiang, Jihui Fan, Yijun Liu, Yanfeng Wang, Fei Xu, "Spiking Neural P Systems with Polarizations and Rules on Synapses", Complexity, vol. 2020, Article ID 8742308, 12 pages, 2020. https://doi.org/10.1155/2020/8742308

Spiking Neural P Systems with Polarizations and Rules on Synapses

Academic Editor: Dimitri Volchenkov
Received23 Dec 2019
Revised27 May 2020
Accepted16 Jun 2020
Published09 Jul 2020

Abstract

Spiking neural P systems are a class of computation models inspired by the biological neural systems, where spikes and spiking rules are in neurons. In this work, we propose a variant of spiking neural P systems, called spiking neural P systems with polarizations and rules on synapses (PSNRS P systems), where spiking rules are placed on synapses and neurons are associated with polarizations used to control the application of such spiking rules. The computation power of PSNRS P systems is investigated. It is proven that PSNRS P systems are Turing universal, both as number generating and accepting devices. Furthermore, a universal PSNRS P system with 151 neurons for computing any Turing computable functions is given. Compared with the case of SN P systems with polarizations but without spiking rules in neurons, less number of neurons are used to construct a universal PSNRS P system.

1. Introduction

Membrane computing is a burgeoning branch of natural computing that develops new computation models based on the structure and functioning of living cells [1, 2]. Membrane systems (also called P systems) are distributed parallel computation models in membrane computing. There are three main classes of P systems, based on the structure of membranes inside living cells: cell-like P systems [3], tissue-like P systems [4], and neural-like P systems [5]. In the field of mathematical and theoretical computer science, P systems are used to investigate numerous types of problems, such as the Turing universality of the system [6, 7], complexity classes [8], numerical problems [9, 10], NP-complete problems [1113], and P systems simulation [14, 15]. The reader can consult [16] for more comprehensive information about membrane computing. Up-to-date research results and open problems can be found on the membrane computing website http://ppage.psystems.eu.

Spiking neural P systems (SN P systems) are a class of neural-like P systems, inspired by the biological phenomenon of neurons conveying information by communicating with each other via identical electric impulses (spikes) [17]. In this type of systems, only one type of spike exists, and the information is encoded by the timing and number of spikes. SN P systems are a class of computation models that use spiking/forgetting rules, which is applied by matching the number of spikes with the regular expression. Many variants of SN P systems have been proposed based on various biological characteristics, such as scheduled synapses [18], structural plasticity [19, 20], thresholds [21, 22], and multiple channels [23]. Meanwhile, there are also extensive studies in the view of the mechanism of information communication between neurons, such as white hole neurons [24], request rules [25], inhibitory rules [26], and communication on request [27]. Most of these systems have been proven to have the equivalent computation power with Turing machine.

In addition, SN P systems have been widely investigated in the field of computer science, which can be used to produce binary and string languages [2831] and simulate the registration machine [32, 33]. With the development of the research, the SN P systems as small universal computing devices are studied [34, 35]. Moreover, SN P systems and their variants have been successfully implemented in real-life applications, for instance, logic gate design [36], image processing [37], fault diagnosis of electric power systems [3840], optimization algorithm design for combinatorial optimization problems [41, 42], and robot control [4346].

Recently, a variant of SN P systems called SN P systems with polarizations (PSN P systems) was proposed in [47], where the rules are controlled by three electrical charges associated with each neuron, not by the regular expression; it is closer to biological reality. In PSN P systems, the use of rules is more limited compared with SN P systems, because only three electrical charges can be selected, but PSN P systems as number devices proved to be Turing universal. As universal computing devices, the computing process of PSN P systems is complicated, and a total of 164 neurons (computational resources) are consumed. It is an open problem whether to find such systems that consume less computational resources, such as using extended spiking rules and delay functions and so on. Herein, we are inspired by the functioning of reflex arcs; the brain sends different signals to different cells to elicit precise actions by the body when a stimulus enters the brain. This biological phenomenon was introduced into SN P systems in [48]; the rules are placed on the synapses, that is, the rules on synapses. However, the rules on the synapse are still triggered using the regular expression. If the use conditions of rules on synapses are weakened, what about the computation power of SN P systems with rules on synapses? Hence, it is also interesting to construct a variant of SN P systems with rules on synapses, where the rules are not controlled by the regular expression.

In this work, inspired by the open problems raised in [47], we put the rules on synapses, proposing SN P systems with polarizations and rules on synapses (PSNRS P systems, for short). In PSNRS P systems, the rules associated with each neuron are placed on synapses, and when the polarity of a neuron meets some rules of its synapses, the rules are activated, and the neuron sends different number of spikes and the same electrical charge to its neighboring neurons. Compared with neurons in PSN P systems that can only send the same number of spikes at some point to its neighboring neurons, the rules on synapses in PSNRS P systems will be more flexible. We investigate the computation power of PSNRS P systems working in the maximally parallel mode. The main contributions of the present work are summarized as follows:(i)Rules on synapses and polarizations are considered in SN P systems; we construct a variant of SN P systems, called SN P systems with polarizations and rules on synapses (PSNRS P systems). In PSNRS P systems, polarization is used to control the application of spiking/forgetting rules associated with each synapse of the neurons.(ii)The computation power of PSNRS P systems is investigated. Specifically, we prove that PSNRS P systems as accepting devices and generating devices achieve universality. Furthermore, a universal PSNRS P system with 151 neurons for computable functions is presented. Compared to the PSN P system, 13 neurons were reduced in computational resources.

The rest of this paper is organized as follows. The formal definition of PSNRS P systems is introduced in the next section. The computation power of PSNRS P systems as number generators and acceptors is investigated in Section 3. In Section 4, a small universal PSNRS P system for computable functions is given. Finally, conclusions and suggestions for further work are presented in Section 5.

2. Spiking Neural P Systems with Polarizations and Rules on Synapses

In this section, we first review some prerequisites. For details on the basic elements of membrane computing and automata theory, the reader can refer to [16, 49]. is the set of all words over the alphabet, including the empty string . corresponds to the set of nonempty words over and is denoted by . The family of sets of natural numbers computed by Turing machines is denoted by .

In the following definition, the notions of polarity and rules on synapses will be used. Only a brief introduction is provided here; please refer to [47, 48, 50] for details.

A PSNRS P system of degree is a construction as follows:where(i) is an alphabet and denotes the spike(ii) are neurons of the form , ( is the number of neurons), where(a) is the initial polarity of neuron (b) is the number of spikes initially located in (iii); is the sets of synapses; each element is a pair of the form , where indicates that there is a synapse connecting neurons and , with , , and is a finite set of rules of the following two forms:(a), for , (spiking rules)(b), for , (forgetting rules)(iv) indicates the input and output neurons, respectively

The spiking rules are applied as follows. If neuron contains spikes and has charge (, ), then the spiking rule is enabled. Meanwhile, spikes from neuron are consumed, and a spike and charge are sent to neuron via a synapse . Note that each synapse can have rules, and they do not affect each other, indicating that neuron sends a difference charge to adjacent neurons.

A forgetting rule is used when neuron maintains charge and at least spikes, so that all spikes are removed from neuron and the charge is sent to neuron by synapse .

At some point, if a rule from can be used by a synapse , the rule must be used. If several rules from can be used by a synapse, these rules are chosen nondeterministically. For example, there are two firing rules, and , in a synapse, with , . The synapse nondeterministically applies one of the rules. Meanwhile, when some rules associated with several synapses originating from the same neuron can be applied, all rules that are applied consume the same number of spikes from the same neuron. In each unit of time, only one rule on each synapse is used. At the system level, rules are used in parallel at different synapses.

In PSNRS P systems, the use of rules is determined by the polarity of neurons and the number of pulses located in neurons and no longer matches the regular expression by checking the number of pulses. More broadly, to use a rule, the total number of spikes inside the neuron should not be less than the number of spikes consumed by the rule. Moreover, the neurons send out not only spikes but also charges, even when using forgetting rules.

Specifically, when a neuron receives a charge from neighboring neurons, the changes in the electrical charges connected to the neuron proceed as follows:(i)Two or more positive charges () and two or more negative charges () lead to one positive charge () and one negative charge(), respectively; several neutral charges (0) lead to one neutral charge (0)(ii)One positive () and one negative charge () cancel each other and give the neutral charge (0)(iii)One positive () or one negative charge () cannot be changed by a neutral charge (0)

In this work, system is considered as a number generator. Usually, the time interval between the first two spikes output by the output neuron is used as the result of a computation. The number is said to be computed by systems , denoted by .

In addition, system can work in an accepting mode, where the output neuron is removed. A number is introduced in the system, by introducing a sequence in neuron . This number is said to be accepted by system if the computation eventually halts. The set of numbers accepted by is denoted by .

We denote the family of all sets of numbers generated or accepted by PSNRS P systems by , where the symbol indicates the generating or accepting mode, represents rules on synapses, there are up to neurons, and each neuron has up to rules on its synapses. As usual, the indices and are replaced with when no bound is imposed on the corresponding parameter.

3. Computation Power of PSNRS P Systems

In this section, we mainly investigate the computation power of PSNRS P systems and prove that PSNRS P systems can generate all recursively enumerable sets of numbers.

We first briefly review the definition of register machines. The construction of a register machine is , where indicates the number of registers, indicates the set of instruction labels, is the start label, is the halt label (assigned to instruction ), and indicates the set of instructions (each of which is precisely labeled by an individual label from ). Each instruction is one of the following forms: ADD instruction indicates that the register is added 1, and then the present instruction labeled with passes to the next instruction or (being chosen nondeterministically); SUB instruction shows that the register is subtracted 1 (if the register is nonzero), and the present instruction labeled with passes to the instruction , or else (if the register is zero) the present instruction labeled with passes to the instruction .

It is known that register machines with three registers can precisely generate a family of sets of recursively enumerable natural numbers; in other words, it can characterize [34].

Theorem 1. .

Proof. We prove only the inclusion ; the reverse inclusion can be invoked from the Church–Turing thesis. For this, a specific PSNRS P system is constructed to simulate a register machine , and the register machine is considered. Each register of is associated with a neuron of ; we represent the number contained in register by 2n spikes located in , and the instruction of corresponds to a neuron . Initially, all neurons are empty; when neuron is active, the instruction labeled with starts. When two spikes are received by neuron , system starts to simulate instruction ( denotes one of the operations ADD and SUB), and either neuron or receives two spikes and a neutral charge, one of which is activated. Then, the system starts to simulate the corresponding instruction. During the simulation of , when neuron , which is associated with the halting label of , is activated, the computation halts. Without any loss of generality, all registers other than register 1 are empty in the halting configuration, and register 1 is never decremented during the computation. The time interval between the first two spikes output by the output neuron is used as the computation result.
The PSNRS P system consists of the following three components: ADD, SUB, and FIN modules, shown in Figures 13, respectively.

In the following sections, we explain how these modules work.

ADDmodule: simulating an ADD instruction .

As shown in Figure 1, suppose that an ADD instruction is simulated in step , and neuron has a neutral charge and receives two spikes.

At step , neuron receives two spikes, rule on synapses and is applied, and then neuron sends one spike and a neutral charge to auxiliary neurons and , respectively. At step , auxiliary neurons and both receive one spike and a neutral charge, the polarity of which remain the same. Rule is used on synapses and , and each of the neurons sends a spike to neuron . When the two spikes are received, the number of spikes in neuron is increased by two, simulating an increase in the number stored in register by one. At the same time, neuron receives a spike from each of neurons and . Rule is applied on synapse , and neuron sends a spike and a neutral charge to neuron . Then, one of the rules and on synapse is nondeterministically chosen and applied, and neuron sends a spike to neuron . There are two possible cases depending on the polarity received by neuron .

Case I. At step , if rule is used on synapse , then neuron receives a spike and positive charge from neuron , and the polarization of the neuron is changed from a neutral charge to a positive charge. At step , neuron sends a spike to neuron via rule on synapse , and a spike is maintained in neuron . At the same step, rule is applied on synapse , and neuron receives a spike and a positive charge. In this way, neuron accumulates a spike and changes to a neutral charge. At step , neuron receives two spikes from neurons and , which both have a neutral charge. Meanwhile, by means of rule , neuron sends a negative charge to neurons and , so the polarizations of neurons and are changed back to their original state. At the same step, rule is used via synapse , and neuron sends a spike to neuron . In this way, two spikes are present in neuron , and system starts to simulate instruction of .

Case II. At step , if rule can be enabled on synapse , a spike and a negative charge are sent to neuron . At step , neuron receives a spike via synapse via rule . At the same step, neuron sends a spike and negative charge to neuron along synapse by rule ; afterwards, neuron has a neutral charge. At step , rule is applied on synapse , and neuron receives a positive charge and returns the original state. Similarly, neuron executes the same rule for neuron via synapse . Otherwise, neuron receives two spikes from neurons and by rules and via synapses and . In this way, the system starts to simulate instruction of .
Therefore, the ADD module can correctly simulate ADD instructions: in neuron , the number of spikes is increased by two; meanwhile, one of two neurons and nondeterministically receives two spikes.
SUBmodule: simulating a SUB instruction .
In this section, we will describe the SUB module, as shown in Figure 2. Suppose that a SUB instruction is simulated and neuron receives two spikes at step . Initially, neuron fires, sending spikes to neuron and neuron using rule on synapses and . However, neuron maintains a positive charge, and neuron is changed to a positive charge. At the same step, rule is applied on synapse , and neuron receives a spike from neuron . According to the number of spikes in neuron , the following two cases are considered.

Case I. At step , neuron has 2 + 1() spikes (corresponding to the number stored in register , being ). In this way, neuron has a positive charge, rule is applied on synapse , and neuron , which has a positive charge, sends a spike and a negative charge to neuron . Note that neuron maintains a neutral charge when a positive charge meets a negative charge, resulting in a spike in neuron . Simultaneously, neuron fires, sending a spike to neuron via rule on synapse . At the same step, neuron sends a negative charge to neuron , and the initial state of neuron is recovered to avoid inaccurate operation. At step , neuron is activated by rule on synapse , sending a spike to neuron ; meanwhile, neuron sends a spike to neuron via rule on synapse . Neuron receives two spikes, which indicates that system simulates the instruction of .

Case II. At step , neuron has a spike (corresponding to the number stored in register being 0). Then, a negative charge is sent to neuron via rule on synapse , and neuron returns to the initial state when a positive charge meets a negative charge. At the same step, neuron is activated by rule on synapse , sending a spike and a negative charge to neuron . At step , rule is enabled on synapse , and neuron sends a spike and a negative charge to neuron . At step , neuron fires, sending a spike to neurons and by rules and on synapses and . Then, there are two spikes in neuron with a neutral charge and a spike in neuron . At step , rule is applied via synapse , and a spike is sent to neuron from neuron . Simultaneously, neuron receives a spike from neuron by rule on synapse . Meanwhile, neuron sends a positive charge to neurons and , restoring their initial states. At step , neuron receives two spikes from neurons and via rule on synapses and . In this way, system simulates the instruction .
The simulation of the SUB instruction is correct: system starts with neuron having two spikes inside and ends with sending two spikes and a neutral charge to neuron (if the number located in register is greater than 0, the register is decreased by one) or sending two spikes and a neutral charge to neuron (if the number located in register is 0).
Obviously, there is no interference between the ADD and SUB modules, but interferences exist between two SUB modules. If there are two SUB instructions acting on register , neurons and associated with register send synapses to neurons and , respectively. In the SUB module associated with (), when we simulate a SUB instruction , all neurons except neurons and receive no spikes and charges.
It is important to note that the synapses and their rules associated with neurons and are not shown in Figure 2; for example, neurons and exist between any two subtraction modules, and the rule is present on the synapse of such two neurons, respectively. Neurons and only consume spikes and restore neutral charge, not affecting other neurons’ states. Moreover, the synapses of neurons and may be connected to any neuron in the environment or neurons related to SUB instruction ; that is to say, the synaptic connections between neuron (or ) and other neurons cannot be described in Figure 2.
When spikes are present in neuron , neuron sends a spike and a neutral charge to neuron ; therefore, neuron fires, rule (not shown in Figure 2) is enabled, then one spike is forgotten, and neuron returns to the initial state. If no spike exists in neuron , neuron receives a spike and a neutral charge from neuron , rule is enabled, and one spike is forgotten. Next, neurons and return to their initial state with respect to the initial number of spikes. Consequently, there is no interference between the SUB modules.
FINmodule: outputting the result of the computation.
As shown in Figure 3, the FIN module is constructed. Assume that the computation halts; in other words, the halt instruction is reached and the result of the computation is stored in register 1 (register 1 contains spikes). Neuron receives two spikes and a neutral charge at step , rule on synapse is activated, and neuron sends a spike and a neutral charge to neuron . At that moment, neuron fires, sending a positive charge to neuron via rule on synapse . Meanwhile, neuron receives a spike and a positive charge from neuron by rule via synapse . At step , neuron sends a spike and a neutral charge to neuron via synapse by rule . Simultaneously, neuron sends a spike and a positive charge to neurons and via rule . Meanwhile, rule on synapse is enabled, and neuron receives a spike and a negative charge from neuron .
At that moment, a positive charge and a negative charge meet in neuron , which therefore has a neutral charge and two spikes. At step , rule on synapse is applied, and a spike is sent from neuron . Meanwhile, neuron fires, sending no spike and a neutral charge to neuron . via rule on synapse . At step , rule is applied, and neuron sends the first spike to the environment. At the same time, neuron receives two spikes from neurons and .
From step to step , the spike of neuron is exhausted by rule on synapse . At step , neuron receives a spike and negative charge from neuron . Then, neuron , which now has a negative charge, sends a spike and a neuron charge to neurons and by rule on synapses and at step . At step , neuron fires, sending a negative charge via synapses and and restoring the initial state of charge. Meanwhile, neuron sends the second spike to the environment by rule . Hence, the interval at which two spikes are sent to the environment by the system is , where is exactly the number stored in register 1, i.e., corresponding to the result computed by system. Therefore, the register machine is correctly simulated by the system , .

Theorem 2. .

Proof. A PSNRS P system , working in the accepting mode, is constructed to simulate a deterministic register machine . The system contains an INPUT module, a deterministic ADD module, and a SUB module. The INPUT module is shown in Figure 4. Spike train is introduced into by means of neuron . In this system, the time interval of the first two spikes introduced by the INPUT module is used as the computing result.
At step , we suppose that neuron receives the first spike from the environment. Neuron fires, sending a spike and neutral charge to neuron via rule on synapse . At the same step, rule is applied on synapses and . A spike is sent to neurons and , and their polarity is changed to a negative charge. Similarly, neurons and receive one spike and a neutral charge from neuron via rules (corresponding to synapses and ). At step , neurons and receive a spike and neutral charge from neuron , respectively. Meanwhile, neuron fires, rule is applied on synapses and , and neurons and receive a spike and a neutral charge from neuron , respectively. Similarly, neurons and receive a spike and a neutral charge by rule on synapses and . From step on, neurons and exchange one spike with each other, and neuron receives two spikes in each step. In this case, at step , neuron receives the second spike from the environment. Then, neurons , , , and receive the second spike and accumulate two spikes. Note that neuron still receives spikes at step , and there are 2n spikes in neuron , which represents the number stored in register 1 of .
At the same step, neurons and send a positive charge to neurons and , respectively, restoring their original states of charge. Meanwhile, neurons and have spikes according to rule on synapses and . At step , the spikes in neurons and are depleted by rule on synapses and .
At the same step, neuron receives two spikes and a neutral charge from neurons and by rule . In this way, neuron receives two spikes and the system simulates the initial instruction of .
For a deterministic ADD instruction of the form , the corresponding ADD module shown in Figure 5 is simpler than that shown in Figure 1. Hence, we do not consider the details here.
In system , the SUB module remains unchanged as shown in Figure 2, and neuron remains in the system; however, the FIN module is removed. There is no rule in neuron . When neuron receives two neurons and no rules are available, the computation stops. The computing result introduced is , which means that the number accepted by system is . The operation process of INPUT module is shown in Table 1.
According to the above description, the register machine working in accepting mode can be correctly simulated by PSNRS P systems. Hence, the Theorem holds.


StepNeurons activeRules executedSynapses

t








4. A Small Universal PSNRS P System

In this section, a small universal PSNRS P system of computing device is constructed. Generally, a register machine is used to compute a Turing computable function in the following way: arguments are introduced by the specified registers (representing the first registers). We begin with the first instruction with label and stop with the halt instruction with label (if we stop), and then the value of the function is stored in a specific register ; beyond that, all other registers are empty. For further information about universal register machines for computable functions, readers can refer to [34].

In the following proof of the universal result, we use a specific universal register machine mentioned in [34], as shown in Figure 6. The universal register machine is of the construct , where there are 8 registers, numbered from 0 to 7, and 23 instructions; the last instruction is the halting one. As defined in [34], the input numbers are introduced in registers 1 and 2, and the result is stored in register 0 when the machine halts.

According to the previous description, subtraction instructions are not allowed on the registers where the results are stored, but register 0 of is subject to SUB instructions. Therefore, register machine is modified into : a register with label 8 is added, and the halting instruction of is replaced by the following instructions:In this way, the universal register machine has 9 registers, 24 ADD and SUB instructions, and 25 labels. The result of the computation is stored in register 8, which is never decremented during the computation. Furthermore, the register machine can be considered deterministic, and, without losing Turing completeness, the ADD instructions having is denoted by the form .

Theorem 3. There is a universal PSNRS P system with 151 neurons for computable functions.

Proof. A PSNRS P system is constructed to simulate the universal register machine , as shown in Figure 7. The system consists of seven modules: ADD, ADD-ADD, SUB, ADD-SUB, SUB-ADD, INPUT, and OUTPUT. The ADD module (resp., SUB module) is applied to simulate the ADD instruction (resp., SUB instruction) of ; in a similar way, each module is applied to simulate its corresponding instruction. However, the INPUT module is used to introduce a spike train from the environment, and the OUTPUT module is used to output the computation result.
In system , each register corresponds to a neuron , and the number saved in register is encoded by the number of spikes stored in neuron . Specifically, register having the number () is equivalent to neuron containing spikes. Moreover, a neuron in system is associated with each instruction in . When neuron holds two spikes, the rules on synapses are enabled, which means system simulates the instruction . Until two spikes and a neutral charge are received by neuron , the computation in is simulated by system . The number of spikes emitted from system into the environment is exactly the result computed by .
All modules are presented in graphical form, indicating the neurons and synapses with the associated sets of rules. In the initial configuration, there is no spike in each neuron.
The INPUT module, shown in Figure 8, introduces and spikes into neurons and by reading the spike train , respectively. The module works as follows.
Initially, neuron receives one spike from the environment. Neuron fires, rule is applied, and a spike and a neutral charge are sent to neurons , , , , , . Afterwards, neuron fires, sending a spike and a negative charge to neurons and by using rules via synapses and . The neuron holds a spike, and no rule is used. Then, neurons and have neutral charge, and the rules on synapses and can be enabled. From that moment on, neurons and exchange a spike and a neutral charge with each other until the neuron receives the second spikes. After step, neuron receives second spike. One step later, the neuron receives a spike and neutral charge. Subsequently, rules on synapses and are applied, and neurons and are changed to positive charge. Rules can be enabled, removing two spikes in each of the neurons and . At that moment, no rules associated with neuron can be used. In this way, spikes are introduced in neuron .
When the second spike arrives in neurons and , rules on synapses and are applied, and then each one receives one spike and one negative charge; hence, they become neutral and contain one spike. From the next moment on, rules are used, and neurons and emit a spike and a neutral charge to each other, in each step, until the third spike arrives in neurons . After step, neuron gets the third spike, and rules on synapses and can be applied. The neurons and have negative charge, and no rules are applied. At the same time, rules via synapses , , and are applied; neurons , , and still keep positive charge; and the extra spikes will be consumed by rules on synapse and via synapses , . In this way, spikes have been loaded in neuron . With a third spike into neurons and , this two neurons fire, rules on synapses and can be enabled, the neuron receives two spikes and a neutral charge, and the system starts to simulate the initial instruction of .
For ADD and SUB modules, we will follow the ADD module in accepting mode as shown in Figure 5 and the SUB module in generating mode as shown in Figure 2.
When neuron receives two spikes, that is, the instruction is reached, the result of computation is store in register 8. The tasks of outputting the result is carried out by the OUTPUT module shown in Figure 9.
Assume that, at step , the neuron gets two spikes, rule on synapse is used, and neuron receives a spike and a neutral charge. Then, there are spikes in neuron , it fires, using rules on synapses and , and a spike and one neutral charge are sent to neurons and . Then, neuron sends a spike and neutral charge to neurons and , so neuron emits a spike and neutral charge out by rule , until spikes are sent out. Note that neuron and neuron exchange a spike and neutral charge with each other, ensuring that neuron can emit all the results of computation for system .
Therefore, according to the above INPUT module, deterministic ADD module, SUB module, and OUTPUT module, we have used the following:(i)9 neurons for 9 registers(ii)25 neurons for 25 labels(iii) neurons for 14 SUB instructions(iv) neurons for 10 ADD instructions(v)10 neurons in the INPUT module(vi)2 neurons in the OUTPUT moduleAll these come to a total of 178 neurons.
This number can be slightly decreased by some code optimization, exploring some particularities of the register machine .
For instance, the sequence of ADD instructionswithout any other instruction addressing the label , can be simulated by the module shown in Figure 10. Then, three neurons associated with label can be saved.
There are also two pairs of ADD-SUB instructions:Each sequence of ADD-SUB instructions,can be simulated by the ADD-SUB module shown in Figure 11.
In this way, we save the 6 neurons associated with labels and .
A similar operation is possible for the following six sequences of SUB-ADD instructions: