Abstract

Based on the step function and signum function, a chaotic system which can generate multiscroll chaotic attractors with arrangement of saddle-shapes is proposed and the stability of its equilibrium points is analyzed. The under mechanism for the generation of multiscroll chaotic attractors and the reason for the arrangement of saddle shapes and being symmetric about y-axis are presented, and the rule for controlling the number of scroll chaotic attractors with saddle shapes is designed. Based on the core chips including Altera Cyclone IV EP4CE10F17C8 Field Programmable Gate Array and Digital to Analog Converter chip AD9767, the peripheral circuit and the Verilog Hardware Description Language program for realization of the proposed multiscroll chaotic system is constructed and some experimental results are presented for confirmation. The research result shows that the occupation of multipliers and Phase-Locked Loops in Field Programmable Gate Array is zero.

1. Introduction

Since the advent of the Lorenz chaotic system in 1976, the proposal, analysis, control, and synchronization of chaotic systems and their applications and the corresponding educational research have become a hot topic [122]. In particular, the multiscroll chaotic system has more complex dynamics than the single-scroll or two-scroll chaotic system so that it has been caused widespread concern and in-depth research. Therefore, designing the chaotic system which can generate multiple chaotic attractors is still significant. It can not only provide the good candidate for chaos application but also enrich the content of nonlinear circuit. So far, according to the shape of chaotic attractors in the phase plane, the types of multiple chaotic attractors mainly include multiscroll chaotic attractors [17, 1618], multifolded torus chaotic attractors [8, 9], multiwing chaotic attractors [1014, 19], and multi-star chaotic attractors [15]. For example, based on Chua’s circuit and using a sinusoidal function, a chaotic system which is capable of generating multiscroll chaotic attractors was proposed and verified by using the hardware circuit with the universal trigonometric converter AD639 in [1]. Ozoguz et al. designed the chaotic system which can generate multiscroll chaotic attractors by using the inverse tangent function and designed the corresponding hardware experimental circuit with nonlinear transconductance [2]. Yu designed a chaotic system that can generate chaotic attractors of multiple vortexes by using a triangular wave function [3]. Lu and Chen summarized the methods of generating chaotic systems with multiple vortex-coil chaotic attractors and the applications of such systems [4]. Yu et al. designed a chaotic system that can generate multifolded torus chaotic attractors with multiple piecewise functions and gave the system parameter design rules when generating multifolded torus chaotic attractors [8]. In the case of multiwing chaotic attractors, Luo et al. designed a multiwing chaotic system by using signum functions and the corresponding hardware circuit experiment [10]. Zhang and Yu [11] designed a class of fractional-order multiwing chaotic system. A chaotic system which has capable of generating multiscroll, multiring, multistar, and multiflower chaotic attractors is proposed [15]. The above research results greatly enrich the content of nonlinear circuits and present a foundation for the application of multichaotic attractors.

In addition, with the rise of digital chaotic secure communication, chaotic systems are widely realized by Digital Signal Processor [23, 24], Field Programmable Gate Array [2527], Advanced RISC Machine [28, 29], Arduino [30, 31], and other digital chips. For example, He et al. implemented a fractional-order Lorenz hyperchaotic system by using Digital Signal Processor [23]. Tlelo-Cuautle et al. implemented a multiscroll chaotic generator by designing Verilog Hardware Description Language program in Field Programmable Gate Array [27]. Lin et al. applied Advanced RISC Machine to design chaotic maps and realize their real-time secret video communication [29]. Pano-Azucena et al. implemented multidimensional multiscroll chaotic systems and realized chaotic secure communication in Arduino [30]. The above research results lay a solid foundation for digital chaotic secure communication. However, as indicated in references [32, 33], compared with Digital Signal Processor, Advanced RISC Machine, and Arduino, it has more advantageous to implement the chaotic system by using Field Programmable Gate Array since it has high flexibility and high computational efficiency. Hence, Field Programmable Gate Array attracts people’s attention to implement nonlinear dynamics of systems, especially chaotic or hyperchaotic systems, including chaotic cellular neural network system [34], image chaotic communication [35], secure color image encryption algorithm based on chaotic signals [36], fractional order chaotic system [37], and a wireless hyperchaotic communication system [38].

In this paper, based on the step function and the signum function, a multiscroll chaotic system which is capable of generating multiscroll chaotic attractors with arrangement of saddle shape in the phase plane is proposed. The under mechanism of the occurrence of multiscroll chaotic attractors and the reason for the arrangement of saddle shapes are analyzed. Based on the Altera Cyclone IV EP4CE10F17C8 Field Programmable Gate Array and Digital to Analog Converter chip AD9767, the peripheral circuit and Verilog Hardware Description Language program are designed to realize the multiscroll chaotic system for confirmation.

2. Mathematical Model of Multiscroll Chaotic System

The mathematical model of the proposed multiscroll chaotic system is as follows:wherewhere x, y, and z are system variables; al, bj, cl, d, m, and n are system parameters, bj, cl, and d are positive numbers, and and . Note that (3) and (4) are the definitions of step functions and (5) is the definition of signum function.

When m = 1, n = 1, a1 = 16, b1 = 0.125, d = 64, and c1 = 0.2 are selected and the initial value being (x0, y0, z0) = (0.25, 0.125, 0.25), the numerical simulation results from Matlab software are presented in Figures 1(a) and 1(b). Figure 1(a) is the phase diagram of the system in the y-z plane, and Figure 1(b) is the Poincaré map on x = y plane. In addition, due to the fact that the classical method for the LEs computation were designed for smooth systems only [39], here the improved and effective method was proposed by Danca in 2015 [40], which can be used to calculate the Lyapunov exponents of discontinuous system, is applied to obtain the Lyapunov exponents of the proposed system and the results are LE1 = 9.1141, LE2 = 0, and LE3 = −51.1867. Therefore, the system is a chaotic system. At the same time, it can be seen from Figure 1(a) that the system has six-scroll chaotic attractors. Among them, four-scroll chaotic attractors are arranged in a row, and the other two are in obliquely above. Obviously, the arrangement of these six-scroll chaotic attractors seems a saddle shape and symmetric about y-axis.

3. Equilibrium Point and Its Stability Analysis

Considering the case of m = 1 and n = 1, equation (1) can be written as follows:

Let the left derivative term of equation (6) be zero, and the equilibrium point of system (6) can be obtained as follows:

Note that, for the third formula in equation 7, when d is positive, z must satisfy z ≥ 0 to make the system have equilibrium points.

Let (X, Y, Z) be the equilibrium point of system (6), and according to the second formula in equation (7), we can obtain X = 0 or

If X = 0, then (X, Y, Z) = (0, 0, 0).

If X is not equal to zero, the equilibrium point of system (6) is

Therefore, the system may have 13 equilibrium points.

However, when selecting a1 = 16, b1 = 0.125, d = 64, and c1 = 0.2 and substituting them into equation (9), it is found that system (6) only has the following seven equilibrium points:

The stability of system (6) under the above equilibrium points can be determined by calculating the eigenvalue of its Jacobian matrix at the corresponding equilibrium points. The Jacobian matrix iswhere δ (x) is the impulse function, when x = 0, δ (x) = inf (inf is positive infinity) and when x ≠ 0, δ (x) = 0. Besides,

After substituting S7 = (0, 0, 0) and the above parameters into equation (11), we can obtain

Obviously, there is a positive infinity element in the matrix Jac7, and its eigenvalues cannot be calculated. However, the characteristic equation of the matrix can be derived, and its result is

Therefore, its eigenvalues are λ1 = −64, , and . S7 = (0, 0, 0) is unstable so that the system trajectory will be exponentially away from this equilibrium point.

Additionally, the eigenvalues at the other six equilibrium points S1S6 are λ1 = −202.644, λ2 = 5.322 + 101.59i, and λ3 = 5.322 − 101.59i. Therefore, these six equilibrium points are all index −2 saddle-focus equilibrium points. In other means, around these six equilibrium points, the system trajectory spirals from one equilibrium point to another, and finally the six scroll chaotic attractors are formed. Thus, the step function and the signum function are all indispensable for generating multiscroll chaotic attractors.

In particular, among these six equilibrium points, in the y-z plane, there are four equilibrium points (S2, S3, S4, and S5) whose Z values are all equal to 0.125 so that these four equilibrium points are arranged in a row. The Z values of the other two equilibrium points (S1 and S6) are equal to 0.25. Combined with the Y values of the two equilibrium points, it can be seen that these two equilibrium points are located obliquely above the equilibrium points S2 and S5, respectively. Therefore, the arrangement of these six-scroll chaotic attractor eventually presents a saddle shape and be symmetric about y-axis.

4. The under Mechanism for Generation of Multiscroll Chaotic Attractors

From the above numerical simulation from Matlab software and theoretical analysis, it can be seen that when m = 1 and n = 1 are selected, the system will generate six-scroll chaotic attractors. If the appropriate values are selected for m, n, and other parameters, the number of scrolls for chaotic attractors should be C1m + C2n + C3, where C1, C2, and C3 are parameters.

Assume that a1 = 16, b1 = 0.125, d = 64, and c1 = 0.2 are unchanged. When n = 1, m = 2, and b2 = 0.25, the numerical simulation results of the system are shown in Figure 2(a). Obviously, the system has eight-scroll chaotic attractors.

When m = 1, n = 2, a2 = 32, and c2 = 0.3, the numerical simulation results of the system are shown in Figure 2(b). Obviously, the system still has eight-scroll chaotic attractors, but its arrangement is different from that of Figure 2(a).

When m = 2, b2 = 0.25, n = 2, a2 = 32, and c2 = 0.3, the numerical simulation results of the system are shown in Figure 2(c). Obviously, the system now has ten-scroll chaotic attractors.

According to the above numerical simulation results, the following formula can be obtained:

Therefore, one can obtain that C1 = 2, C2 = 2, and C3 = 2 so that this chaotic system can generate 2m + 2n + 2 scroll chaotic attractors, where m can control the saddle in the saddle shape. The larger m is, the wider the saddle is; n can control the saddle bridge in the saddle shape; the larger the n is, the higher the saddle bridge is.

5. FPGA Implementation of Saddle-Shaped Multiscroll Chaotic System

The Altera Cyclone IV EP4CE10F17C8 Field Programmable Gate Array is used. In addition, in order to observe the output waveform and compare it with the numerical simulation results, the Digital to Analog Converter chip AD9767 (14-bit) is used to convert the Field Programmable Gate Array calculation result into analog output and connect it to the oscilloscope GDS 3254 for observation.

When designing the program, by considering the chaotic region of the proposed multiscroll chaotic system, the resolution, and the Digital to Analog Converter chip AD9767 (14-bit), the fixed-point data format 32Q26 is used, in which the highest 1 bit is the sign bit, the next highest 5 bits are the integer bits, and the remaining 26 bits are the decimal places.

To calculate equation (1), first discretize equation (1) as follows:where Δt is a discrete step and is equal to 1/512.

Assuming that Vk = (xk, yk, zk, )T, equation (16) can be expressed as follows:

Here, the second-order Runge–Kutta algorithm with two calculation steps is used for calculation. The first step is to update the data in half-step calculations:

The second step is to calculate the update data with and obtain :

After successfully designed by Verilog Hardware Description Language, the program is burned into the Field Programmable Gate Array through Universal Serial Bus Blaster, then the program will be converted into a hardware list, and the corresponding digital circuit will be formed in the Field Programmable Gate Array to realize the operation. The Register Transfer Level Viewer in the Quartus II is shown in Figure 3. Note that the “clock” and “rst1” in Figure 3 are the clock and reset signals of the Field Programmable Gate Array, respectively, “clock1,” “clock2,” “wreset1,” and “wreset2” are the clock and reset signals of the Digital to Analog Converter chip, respectively, “ouput_en” is the output enable terminal and is active high, “x [13..0],” “y [13..0],” and “z [13..0]” are the digital outputs of x, y, and z at the time of each step,“dac_CH1 [13..0]” and “dac_CH2 [13..0]” output “y [13..0]” and “z [13..0]” to the Digital to Analog Converter chip AD9767 for digital-to-analog conversion, respectively.

The experimental results are shown in Figure 4. Figure 4(a) shows the experimental results of the y-z phase diagram under m = 1 and n = 1, and Figure 4(b) shows the experimental results of the y-z phase diagram under m = 2 and n = 1, Figure 4(c) shows the experimental results of the y-z phase diagram under m = 1 and n = 2, and Figure 4(d) shows the experimental results of the y-z phase diagram under m = 2 and n = 2. Comparing Figure 4 with the corresponding graphs in Figures 1 and 2, the results of these two sides are consistent, which indicates the feasibility and effectiveness of using FPGA to realize the multiscroll chaotic system which is capable of generating saddle-shaped multiscroll chaotic attractors.

Also, in the Quartus II interface, the resources occupied by these multiscroll chaotic systems that can generate saddle-shaped multiscroll chaotic attractors when using the Altera Cyclone IV EP4CE10F17C8 Field Programmable Gate Array design program are 20% of the logic cells, 19% of pins, and 24% of memory bits. Particularly, due to the fact that the proposed multiscroll chaotic system is a piecewise linear system, and the coefficients are equal to 2N where N is the nature number so that the multiplication in the system can be realized by shift bit in Verilog HDL program which leads to 0% of multipliers being used. Additionally, the clock signal for the Field Programmable Gate Array equals the clock1 and clock2 signals for the Digital to Analog Converter chip so that it is no need to use Phase-Locked Loops in Verilog HDL program which leads to 0% of PLLs being used.

6. Conclusion

Theoretical analysis, numerical simulation, and Field Programmable Gate Array experiments show that the reason for the proposed multiscroll chaotic system, which can produce saddle-shapes 2m + 2n + 2 scroll chaotic attractors, is that the system has 2m + 2n + 2 index −2 saddle-focus equilibrium points and the arrangement of the index −2 saddle-focus equilibrium points in y-z plane is saddle shaped. Moreover, by selecting m and n, the number of scrolls of chaotic attractors and their arrangement shape can be controlled. In addition, the Verilog Hardware Description Language program that implements this multiscroll chaotic system is designed with the core device Altera Cyclone IV EP4CE10F17C8 Field Programmable Gate Array and Digital to Analog Converter chip AD9767, and the results from the Quartus II show that the multiplier and Phase-Locked Loops occupying the Field Programmable Gate Array’s resources are both zero. Therefore, compared with other multiscroll chaotic systems that must be implemented by multipliers or Phase-Locked Loops in Field Programmable Gate Array, the proposed multiscroll chaotic system occupies less Field Programmable Gate Array resources.

Data Availability

The data used to support the findings of this study are available from the corresponding author upon request.

Conflicts of Interest

The authors declare that there are no conflicts of interest regarding the publication of this paper.

Acknowledgments

This work was supported in part by the National Natural Science Foundation of China under Grant 51377124.