Abstract
In this parper, a 4D absolute memristor Jerk chaotic system is proposed. Firstly, complex dynamics are studied by phase diagram, Poincaré section, power spectrum, bifurcation diagram, 0-1 test, and Lyapunov exponent spectrum. Then, the period doubling bifurcation, degradation, and offset boosting are revealed. For the feasibility of practical application, the analog circuit and FPGA digital circuit are designed. Finally, a simplified predefined time synchronization scheme is proposed; comparing with the full control input synchronization scheme, the simplified predefined time synchronization scheme can not only reduce the controller inputs but also predefine the synchronization time.
1. Introduction
Nonlinear phenomena have a profound impact on the use of math-physical methods to describe our objective world, especially the use of chaotic theory to design and study circuits with simple structure, easily implementation, and complication in dynamics behavior, which is used in the fields of weak signal detection [1, 2], image encryption [3, 4], neural network [5–7], etc. As a new component describing the relationship between magnetic flux and charge, memristor was first proposed by Chua in 1971 [8]. Its rich nonlinear behavior and malleable have been widely used in recent years, including the design of memristor circuits with different orders and the construction of circuit models [9–12]. As a nonlinear dual-port element, memristor is added to the classical nonlinear system, such as Chua’s circuit [13], Lorenz system [14], and Chen’s system [15]. The memristor circuit composed of various classical nonlinear circuits shows colorful and unforgettable dynamic behaviors, including hidden attractors [16–18], hyperchaotic behaviors [19], symmetric attractors [13], and extreme multistability [20–23] with infinite number of coexistence attractors. The memristor model described by piecewise linear function [24], quadratic nonlinear function [25], and cubic nonlinear function [26] is a mathematical model often used by scholars. Different from the previous ones, this paper attempts to introduce a novel and interesting magnetic flux memristor model with absolute value function. These classes of memristors have uncertain two-sided characteristics due to its special properties, that is, it cannot only provide more flexibility in practical engineering but also may cause damage to the system.
The application of chaotic sequences is an extremely important link. In many cases, unipolar signals are often required in practical circuit applications, but the polarity conversion has become a thorny problem. In order to change this situation, Li [27] proposed a chaotic amplitude control method; by introducing a constant term into the system, offset boosting can be achieved, which solves the problem of polarity conversion of chaotic signals; meanwhile, it does not change the dynamics of the system. Since then, many scholars have applied this method to the proposed chaotic systems, such as the offset boosting control of the integer order chaotic attractor [28, 29] and the fractional-order chaotic attractor [30, 31]. Here, the original system is converted into a self-replicating system, resulting in an infinite number of attractors with extreme multistability. Therefore, the application of chaotic system in engineering can be greatly enriched by offset boosting control, and the study on offset boosting control is becoming active increasingly.
It can be seen from the previous description that the multistability of memristor chaotic system brings many advantages in engineering; however, it will also lead to some undesirable things due to the “minor to damage” characteristics of chaos. In the past, scholars have proposed different control schemes to achieve the synchronization of memristor chaotic systems as follows: finite time synchronization schemes [16, 32–35]and fixed time synchronization schemes [18, 36, 37]. In addition, these proposed synchronization schemes require the same controller input dimension as the system dimension, which makes the controller more complex, and synchronization time cannot be given. In order to eliminate these defects, this paper considers introducing a simplified predefined time synchronization scheme, which synchronization time function is easier to realize than that of these previous synchronization schemes, and fewer controllers, so as to realize the control of “predefined” time for a class of Jerk systems with absolute value memristor.
Based on this, the main structure of this paper is as follows: Firstly, in Section 2, through the analog circuit realization and numerical simulation results of the absolute memristor, we can find that the absolute memristor has rich memristor characteristics and verify the influence of frequency and voltage amplitude on the area of hysteresis loop. Therefore, based on this, a novel 4D absolute memristor Jerk system is proposed. In Section 3, the dynamic analysis of the system is carried out, such as phase diagrams, Poincaré section, Lyapunov exponent spectrum, power spectrum, bifurcation diagram, 0-1 test, and offset boosting, revealing the rich dynamic behavior of the system. In Section 4, the analog circuit and FPGA digital circuit of the system are designed to verify the feasibility of the system. In Section 5, a simplified predefined time synchronization scheme is proposed innovatively, which overcomes the shortcomings that the synchronization time of finite time and fixed time synchronization schemes cannot be “predefined,” and then compared with the full control input synchronization scheme, the simplified predefined time synchronization scheme can also reduce the controller input. Finally, the conclusion and the future work are given in the last section of this paper.
2. Properties of Absolute Memristor Model
2.1. Equivalent Circuit and Characteristic of Absolute Memristor
The memristor is a dual-port circuit element described by the equation ; the mathematical expression of the magnetic control memristor described by a piecewise quadratic nonlinear function characteristic curve is as follows:
In equation (1), , are positive constants, and is a symbolic function. We calculate the differential of time at both ends of equation (1) at the same time, and the following relationship holds:
Here, , , is the magnetron absolute value type memristor as follows:
That is, equation (2) is the VCR of the piecewise quadratic nonlinear magnetron memristor, and the absolute value type memristor is controlled by its internal state variable flux . The parameters are , in the equation (3), and the relationship between the driving voltage and the current can be obtained by applying the driving voltage at both ends of equation (3). Furthermore, the absolute memristor circuit schematic diagram shown in Figure 1 can be designed according to the circuit theory.
According to the absolute memristor circuit schematic Figure 1, the circuit equation shown in equation (4) can be obtained. Moreover, the and curves of the absolute memristor are further realized according to the analog circuit simulation of the absolute memristor, as shown in Figure 2. The correctness of the tight hysteresis loop of the voltage and current origin contraction of the absolute value memristor is verified by circuit simulation.
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In order to further verify the correctness of the memristor characteristics realized by the analog circuit of absolute memristor, the driving voltages at both ends of the memristor are subjected to different excitation amplitudes and different excitation frequencies.
For the absolute memristor, the influence of the amplitude and frequency of the external excitation signal on the area of the memristor hysteresis loop is studied. Through the external input voltage , its sinusoidal function . It can be seen from the description in Figure 3 that the amplitude of the sinusoidal excitation signal is positively correlated with the area of the hysteresis loop, and the frequency is negatively correlated with the area of the hysteresis loop.
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2.2. Modeling of a Absolute Memristor Jerk Chaotic System
In [38], there is a Jerk system, and the mathematical model is described as follows:where and are the positive constant and , , and are the state variables. By introducing the new expression (2) to the degenerate Jerk system in (5), a novel class of degenerate chaotic Jerk system based on memristor can be described as follows:where and are the positive constant and is the memory derivative function of the previous absolute memristor equation (3). The nonlinear characteristics and dynamic behaviors of the novel memristor system (6) introduced in this paper are worth studying in the following sections.
3. Stability and Dynamics Analysis
3.1. Stability Analysis
Let , , and on the left side of equation (6) be equal to zero. It is easy to find that the set of equilibria of the system is , where is a real constant. Linearize equation (6) at this set of equilibria to obtain the Jacobian matrix of the system is as follows:
Since the equilibrium is , the characteristic polynomial of the system can be obtained as follows:
According to the Routh–Hurwitz stability condition, the necessary and sufficient condition for the existence of roots of equation (2) given above is . When the characteristic roots of equation (2) are , , , it is called a stable node. Therefore, the system can generate chaotic and rich dynamic behavior, and the parameter . It should be noted that the stability of equation (6) cannot be simply determined by equilibrium set . Therefore, the dynamical behaviors of system (6) under other conditions are further analyzed below.
3.2. Dynamical Analysis
3.2.1. Phase Trajectory, Poincaré Section and Power Spectrum
The parameter selection for the system is , , , and initial value is . The chaotic phase diagrams generated by the system under this parameter condition are shown in Figure 4. The corresponding Lyapunov exponent spectrum is calculated as ; the Wolf algorithm shows that the system exhibits chaos.
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Similarly, under the condition that the parameters of system are consistent with the previous one, the Poincaré section and power spectrum characteristics are described, respectively, in Figures 5 and 6 to illustrate.
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From the description in Figure 5, it is found that the Poincaré cross section is not a closed curve but a curve with phase diagram profile composed of dense points. The power spectrum in Figure 6 is found to be continuous without obvious wave peaks. It is concluded that the system is a chaotic system with complex dynamic behavior.
3.2.2. Bifurcation and Lyapunov Exponent Spectrum
In the system, to set the system parameter to , , , and is the initial value of the system. When selecting system parameter as system variable, the bifurcation diagram and Lyapunov exponent spectrum (LEs) of state variable can be obtained, as shown in Figures 7(a) and 7(b). When the system parameter is increasing, the bifurcation diagram shows that the system has inverse period doubling bifurcation when the parameters and , respectively. Similarly, the complex dynamic characteristics of the system can be described according to the Largest Lyapunov exponent . According to Figure 7(b), when , , and when , . In addition, the fourth value of LEs4 is always less than zero, which is not described in Figure 7(b). Therefore, the dynamic behavior is consistent when describing the change of parameter in Figure 7.
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According to the 0-1 test method, the periodic state or chaotic state of the system can be judged qualitatively under the influence of parameter [39]. This method is mainly the quantitative analysis method which is used to detect whether there is chaos in the system. When parameter , the trajectory of the system on the plane is chaotic and irregular. When the parameter , the trajectory of the system on the plane is regular and orderly, as shown in Figure 8. The reflected dynamic behavior is the same as that in Figure 7.
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Considering the dynamic phenomena caused by the change of initial value, fixed parameters are , , , , and is the initial value of the system, When is selected, the chaotic window and periodic window appear alternately, and the period doubling bifurcation phenomenon occurs when . As it continues to increase to , chaotic jump occurs and a short reverse period doubling bifurcation occurs until the end. The bifurcation diagram and LEs of system as variable are drawn in Figure 9. They reflect the dynamic characteristics of as independent variable, and the two reflect the same dynamic behavior.
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Furthermore, the dynamic behavior of bifurcation diagram and LEs reaction is verified according to the type of phase diagram attractor of the system. The values of variable are selected as 0.0, 1.5, and 2.0 in the system bifurcation diagram. The system phase diagram-type characteristics that can be drawn are shown in Figure 10.
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When is used as a system variable, other parameters remain the same as the previous one, when the variation range of belongs to . As can be seen from Figure 11(a), when the variable increases, the system enters the large-scale chaotic window from the periodic window and ends with a short periodic window at the end. After variable , the system enters the periodic window from the chaotic window. Then, there is a jumping chaotic band when , which then jump to the cycle window. Through the LEs depicting the change of the initial value variable in Figure 11(b), it is found that the result is consistent with the dynamic phenomenon described in the bifurcation diagram in Figure 11(a).
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Similarly, when is , the phase diagram-type characteristics of the system is shown in Figure 12. It can be found that when the initial value changes, the system shows different characteristic types of chaotic attractors.
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3.3. Transient Chaos of the System
The chaotic motion state of the system has limited life, and its main dynamic feature is that the system suddenly changes into a stable periodic motion in a short time of chaotic state, which can be called transient chaos [19], in order to reveal this transient chaotic phenomenon, by setting the system parameter to , , , , and is the initial value of the system. According to the description in Figure 13, it can be found that the system is chaotic within and periodic after . Therefore, the system has a short time of chaotic state and then degenerates into a periodic state.
Furthermore, the transient chaos behavior of the system is judged according to the characteristic type of the phase diagram. The chaotic phase diagram and periodic phase diagram of the system are drawn, respectively, in the time period of and through Figure 14.
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Transient chaos can also be described according to the time domain waveform of LEs of the system and the time domain waveform of state variable of the system, as shown in Figure 15. However, only the first and second curves are drawn in the time domain waveform of LEs, and the third and fourth curves are always less than zero. It is found from the LEs of the system in Figure 15(a) and the time domain waveform of the state variable as shown in Figure 15(b). It can be seen that the system before , after . In addition, the time-domain waveform of the system state within , and the system shows a periodic state in this interval, as shown in Figure 15(b). It further shows that the system has transient chaos.
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3.4. Offset Boosting
In the memristor chaotic system, the position change of the attractor is changed by adding a constant term to the uncoupled term of the system. This phenomenon is a potential feature of the memristor chaotic system, which can control the chaotic attractor of the system through the constant term. It can be found in the system that state variables and are independent uncoupled state variables. Therefore, and in the system can be replaced by and . We can know that and are the two control parameters of the offset boosting, and the system can be expressed as follows:
In equation (9), the parameter is set to , , , . First, only one control parameter is changed and parameter . Case 1: When is selected as the initial value of system (9), the offset boosting control parameters take the values of , and , respectively. Though Figure 16 shows the offset boosting phenomenon of system (9) under the influence of a single control parameter , Figure 16(a) shows that the system phase diagrams move left and right along the direction on the space. Case 2: Select system (9) initial value as , and the control parameters are the same as those in Case 1. Figure 16(b) shows that the system periodic phase diagrams move left and right along the direction on the plane.
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In order to study the offset boosting under the influence of another control parameter , here, the parameter selection and initial value of system (9) are consistent with the previous research control parameter . Case1: , , as shown in Figure 17(a). Case2: , , as shown in Figure 17(b). It can be seen that under the control parameter , the phase diagrams of system (9) move left and right along the direction.
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Similarly, when studying the offset boosting caused by the simultaneous change of double control parameters and , the selection of system (9) parameters and initial values are consistent with the previous one. The values of control parameters and are, respectively, , ; , ; , . It can be found from Figures 18(a) and 18(b) that system (9) phase diagrams can translate and enlarge in space and plane under the control of two parameters. It can be seen that the two parameter control of offset boosting mainly moves in the and directions in the plane.
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4. Circuit Implementation
4.1. Analog Circuit Design
The circuit realization of memristor chaotic systems is another method to study its dynamics and confirm its feasibility. Here, the analog circuit of the system is designed, and the circuit design schematic diagram is shown in Figure 19. During the design of the circuit principle, the common electronic analog components are designed based on the method of operational amplifier. The circuit includes 20 resistors and two absolute value modules designed by operational amplifier. Then, the capacitor is C1–C4, the multiplier is AD633, and the output coefficient is 0.1. The model of operational amplifier is TL8012 series. The analog circuit includes four channel circuits, and each channel is equipped with operation amplification circuit, integral operation amplification circuit, and inverse circuit. We add two absolute value circuit operation modules in the first and fourth channels of the circuit, and the circuit output states of the four channels are , , , and , respectively.
According to the circuit schematic diagram Figure 19 and Kirchhoff voltage law, the circuit equation of the following system can be obtained:
The value of electronic components in circuit equation (10) is shown in Figure 19, and power supply is adopted for all operational amplifiers. As shown in Figure 20, the chaotic phase diagrams captured by the system in the analog oscilloscope are described. The results show that the experimental results of the analog circuit are consistent with the numerical simulation results of the system, which shows the effectiveness of the analog circuit design.
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4.2. FPGA Digital Circuit Implementation
Through the FPGA digital circuit experiment [11, 40], the chaotic phase diagram of the system is realized on the digital oscilloscope to illustrate the rationality of the system design. In this paper, an FPGA based on the Xilinx XC6SLX16-2FTG256I chip is chosen, which has the advantages of low statics, adjustable I/O port conversion rate, abundant logic resources, and large logic capacity. These advantages are very helpful for realizing the actual digital circuits that implement chaotic systems. In addition, the resource utilization of the chip is enumerated in Table 1.
Then, the system is discretized as shown in equation (11),
In addition, the FPGA digital circuit of the system is designed, and the sampling time is 0.001. The continuous signal of the system can be obtained through the digital to analog conversion module. After debugging the digital oscilloscope, the chaotic phase diagrams of the system can be captured in the oscilloscope. The chaotic phase diagrams on the , and planes are shown in Figure 21. Therefore, the correctness of the analog circuit design and numerical simulation results of the system can be verified.
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5. Synchronization Scheme Design of the System
In this paper, the simplified predefined time synchronization scheme is proposed, which not only reduces the controller inputs but also knows the synchronization time.
Lemma 1. [41]: If the state is satisfied,In equation (9), and . If and M is bounded, then can converge to zero within the predefined time .
5.1. Predefined Time Full Control Input Synchronization
It can be seen that the main system of the system is described as follows:
The slave system of the system iswhere are the status of the slave system, are control input.
We define the synchronization error of the system as
The time derivative of equation (16) is calculated as follows:
By substituting equation (14) and equation (15) into equation (17),we can get
Therefore, the controller design of the predefined time full control input synchronization scheme is as follows:where and .
We substitute equation (19) into equation (18) to obtain
Therefore, considering that Lemma 1 is valid, through equation (20), the following relationship is established:
According to Lemma 1, the synchronization error realize synchronization within the predefined time , as shown in equation (22).
5.2. Simplified Predefined Time Synchronization
The main system of the system is equation (14), and the design of the slave system is as follows:
The slave system status and are the control input.
We define the system synchronization error as
The time derivative of is calculated as follows:
Substituting equation (14) and equation (23) into equation (25) can obtain
In the case of satisfying the predefined time convergence algorithm of Lemma 1, the expected synchronization error satisfies equation (27).
Then, in order to satisfy (27), considering (26), the desired value of can be defined as follows:
To satisfy (28), two new errors are defined
Therefore, the controller design of the simplified predefined time synchronization scheme is as follows:
According to the proposed simplified predefined time synchronization scheme, if Lemma 1 is valid, the system achieves synchronization and error converges to zero within the predefined time .where , , and . Combining the and functions in equation (29) and equation (26), equation (32) is established.
Therefore, by substituting equation (30) into equation (32), we can get
According to Lemma 1, from equation (33), it can be seen that the errors and are synchronization and converge to zero within the predefined time and , respectively. Therefore, it can be proved that the synchronization error achieves synchronization and converges to zero within the predefined time , but the synchronization error may diverge to infinity before the and synchronization errors converge to zero.
Considering the influence of and , it is proved in two steps. In step 1, the proof is that the synchronization error is bounded before and converge to zero. In step 2, the proof is that the synchronization error can converge to zero to achieve synchronization before and converge to zero. In step 1: According to equation (33), equation (34) is valid. Lassume there are Combining equation (25) and equation (29), we can get It can be further known from equations (35) and (36). So, we can conclude that It can be concluded that and are bounded. In step 2: From Lemma 1, and are bounded, and according to equation (33), it can be known that the error converge to zero to achieve synchronization at the predefined time and , that is, Combining equation (36) and equation (39) can obtain
Step 1 shows that and are bounded. Therefore, through Lemma 1, it can be known that and can converge to zero to achieve synchronization at the predefined time.
So, we have
According to equation (26) and equation (43), equation (44) is further established.
Through equation (42) and equation (44), we can get
5.3. Numerical Simulation of Predefined Time Synchronization Scheme of the System
The system parameter selection is , , , and initial value is . Figure 22 shows the controller input of the synchronization scheme. Figure 22 shows the comparison of two different control schemes, where the red line is the simplified predefined time synchronization scheme, and the blue line is the predefined full time control input synchronization scheme.
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By comparing the simplified predefined time synchronization scheme with the predefined full control input synchronization scheme, it is obvious that the simplified predefined time synchronization scheme can reduce the controller input. It can be seen from Figure 22 that the simplified predefined time controller input, which only requires the input of two controllers and , and the input of the other two controllers and are zero. Figure 23 shows the predefined time synchronization error curve.
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From Figure 23, it is found that the synchronization error of the system converges to zero and realizes synchronization within the predefined time. Therefore, the rationality and applicability of the predefined time synchronization control scheme are illustrated by numerical simulation.
6. Conclusion
In this paper, a 4D absolute memristor Jerk chaotic system is proposed. Firstly, the memristor characteristics of the hysteresis loop change of absolute memristor are analyzed according to the changes of frequency and amplitude, which are verified by analog circuit and numerical simulation. Secondly, through the phase diagrams, Poincaré section, power spectrum, bifurcation diagram, 0-1 test, and Lyapunov exponent spectrum method of the system, the complex dynamic behavior caused by the change of parameters and initial values of the system is studied. It is found that the system has reverse period doubling bifurcation, chaos degradation, and offset boosting. In addition, through the system analog circuit design and FPGA digital circuit implementation, the phase diagrams of the system are captured in the oscilloscope to illustrate the feasibility of its practical application. Finally, a simplified predefined time synchronization scheme and a predefined full control input synchronization scheme are proposed. Through numerical simulation, it can be found that the proposed simplified predefined time synchronization scheme not only simplified the input of the controllers but also achieves system synchronization in the predefined time. This paper provides a study for the dynamic analysis of a novel Jerk memristor system, and its rich dynamic behaviors are displayed, providing a theoretical basis for the following practical engineering applications. Meanwhile, we hope that in the next work, we can use the symplectic algorithm to recalculate the numerical solution and realize the control circuit of the system expectantly.
Data Availability
All data used to support the findings of this study are available from the corresponding author upon request.
Conflicts of Interest
The authors declare that they have no conflicts of interest.
Acknowledgments
The authors acknowledge the referees and the editor for carefully reading this paper and giving many helpful comments. This work is supported by the National Natural Science Foundation of China (61973249), the Key Research and Development Programs of Shaanxi Province (2021ZDLGY02-06), the Natural Science Basic Research Program of Shaanxi (2021JM-533, 2021JQ-880, 2020JM-646), the Innovation Capability Support Program of Shaanxi (2018GHJD-21), the Qin Chuangyuan Project (2021QCYRC4-49), the Support Plan for Sanqin Scholars Innovation Team in Shaanxi Province of China, the National Defense Science and Technology Key Laboratory Fund Project (6142101210202), the Qinchuangyuan Scientist + Engineer (2022KXJ-169), the Scientific Research Program Funded by Shaanxi Provincial Education Department (21JK0960), the Scientific Research Fund for High-Level Talents of Xijing University (XJ21B01), and the Scientific Research Foundation of Xijing University (XJ210203).