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Discrete Dynamics in Nature and Society
Volume 2015, Article ID 586842, 6 pages
http://dx.doi.org/10.1155/2015/586842
Research Article

Optimal Design of FPGA Switch Matrix with Ion Mobility Based Nonvolatile ReRAM

School of Computer Science and Technology, Zhoukou Normal University, Zhoukou 466001, China

Received 27 December 2014; Accepted 15 February 2015

Academic Editor: Zidong Wang

Copyright © 2015 Peng Hai-yun and Zhou Wen-gang. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

There are high demands for research of new device with greater accessing speed and stability to replace the current SRAM storage cell. The resistive random access memory (ReRAM) is a metal oxide which is based on nonvolatile memory device possessing the characteristics of high read/write speed, high storage density, low power, low cost, very small cell, being nonvolatile, and unlimited writing endurance. The device has extreme short erasing time and the stored charge cannot be destroyed after power-off. Therefore, the ReRAM device is a significant storage device for many applications in the next generation. In this paper, we first explored the mechanism of the ReRAM device based on ion mobility model and then applied this device to optimize the design of FPGA switching matrix. The results show that it is beneficial to enhance the FPGA performance to replace traditional SRAM cells with ReRAM cells for the switching matrix.

1. Introduction

As the development of the advanced electronics, a number of fundamental and practical problems start to emerge for traditional devices (such as field effect transistor) due to electrostatic limitations and other inherent constraints in nanometer level fabrication. New devices and architectures are expected to propel the development of semiconductor industry for the next several years. Two-terminal resistive random access memory (ReRAM, also called memristive device or memristor) has attracted increasing attention as a suitable alternative to traditional devices [14]. In such a device, a conduction path which has large nonvolatile resistance change is sandwiched between top and bottom electrode. Such device has very simple structure and can be scaled to be less than 10 nm in size. ReRAM device has two basic operations: SET and RESET, which represent low resistance state and high resistance state, respectively. The resistive change can be obtained by applying continuous sweeping pulse. This device has high integration density, random access, and nonvolatile characteristics. Therefore, the advantages of ReRAM give implications to make it a candidate of storage cell for FPGA (field-programmable gate array) switch matrix, which requires both high speed and low threshold voltage.

In this paper, we explore the mechanism of the ReRAM device and put forward a physical model based on ion mobility for this device. The I-V characteristics are investigated to describe the device electrical behavior. Furthermore, we propose a novel application of the nonvolatile ReRAM used in the FPGA switch matrix. The results show that the logic function with the ReRAM-based FPGA is quite appropriate.

2. ReRAM Model and Characteristics

Chua first presented the missing circuit element that he called a memristor [5, 6] (memory + resistor) which is deduced from the six possible combinations of the four fundamental circuit variables: , , , and . Five combinations have been well known: resistor (), inductor (), capacitor (), voltage (), and current (). Considering the mathematical symmetry, he claimed that there should be a forth fundamental element called memristor which is defined by the relationship between charge and magnetic flux. Although he predicted the memristor’s existence in the form of the combination of the exist circuits, discovery of a memristor in the form of a physical device has not been discovered before May 2008 [3].

The memristor is actually a nonlinear resistor with memory function, described through relationship between flux and charge according to Chua. Like that a resistor is defined by the voltage and current, capacitance is described by the charge and voltage, and the inductance is defined by the relationship of flux and current. According to the definition, the memristor is expressed by

If (1) is transformed to single value function of charge , then the charge controlled voltage equation can be defined as

We translate charge into the form of integral calculus; then (2) is

We can conclude from (3) that the memristance is decided by the integral calculus of the current from to for the arbitrary time. Therefore, despite the fact that the memristor exhibits the same characteristics as normal resistor for arbitrary time , the resistance depends on the moment when the current flows through the memristor. Therefore, the device can be viewed as both memory and resistor. Once the current or voltage is designated, the memristor is just a linear time-varying resistor, where the form is ohmic characteristics.

In this paper, we present a simplified physical model for memristor (ReRAM) based on the ion mobility model. This model is deduced from a generalized memristive system framework and can explain the dynamic resistive switching phenomena observed in a broad range of devices. Furthermore, by constructing a simple model of the ReRAM, we can apply it for subcircuit simulator.

2.1. The Mechanism of the ReRAM

Most of the ReRAM function models are based on HP dopant metal oxide TiO2 structure [3, 7, 8] which presents the on/off conductance ratios of more than 1 × 103. There is a thin semiconductor film that has two regions, one with a high concentration of dopant that behaves like a low resistance called and the other with a low dopant concentration with higher resistance called . The basic idea is that a dielectric, which is normally insulating, can be made to conduct through a filament or conduction path formed after application of a sufficiently high voltage. The conduction path formation can arise from different mechanisms, including defects metal migration, and so forth. Once the filament is formed, it may be reset (broken, resulting in high resistance) or set (reformed, resulting in lower resistance) by an appropriately applied voltage. Recent data suggest that many current paths, rather than a single filament, are probably involved [9, 10]. Figure 1 shows the initial state, forming, reset, and set process between the TE and BE in the ReRAM cell.

Figure 1: The ReRAM on/off switch is first formed in the media films after a virgin voltage bias. The thin filaments rupture in the reset process and the current is hard to flow between TE (top electrode) and BE (bottom electrode), and the ReRAM shows HRS (high resistance state) characteristics. The thin filaments reconduct under the electric field in the set process. The current is easily flowing through TE and BE, and the ReRAM exhibits LRS (low resistance state). (a) No filament exists in the initial state. (b) Filament is formed by ion mobility.
2.2. Silvaco Doping Model for ReRAM Switch On/Off

First, we need to determine the I-V relationship of the ReRAM device. According to the analysis above, the resistance is dominated by the doping material between the tip of the filament and the opposing electrode with a distance expected to be a few nanometers in the ReRAM where the filament has not bridged the top and the bottom electrode. At such distances, it is reasonable to assume that the current is dominated by tunneling [7]. Using the expressions for a square barrier [4], the current can be expressed aswherewhere is the filament area, is the effective electron mass, is Planck’s constant, and is the barrier height at zero applied bias. is the film thickness and is the length of the conductive filament region, is the charge on one electron, and is the operating temperature in Kelvin metrics.

The detailed mechanisms of the resistive switching especially for ReRAM material are still under further investigation, so developing better models can account for experimental I-V curves of these devices which are useful for comprehending the operation and optimizing both the operation and structure of the device.

To this end, we use Silvaco (a mathematical resolver) to simulate the ReRAM device. The Atlas module is a device simulation framework to simulate the electrical, optical, and thermal behavior of semiconductor devices and it enables the user to create their own models in order to investigate the material and device characteristics. Considering that destruction or reformation of the conduction path is dependent on the material’s temperature and the variation of device resistivity can be expressed as ion mobility change between the TE and BE, a user-definable ion mobility model can be used to simulate the resistive change process. According to this simulation, we can predict electrical behavior of the ReRAM device.

Figure 2 illustrates the formation of conduction path based on ion mobility. To obtain sufficient ion mobility, 8 × 1012 cm−2 dose of boron is implanted into oxide and diffused under the temperature of 950°C for about 2 hours. The initial state of device is formed. And if applying a continuous pulse, the conduction path forms from top electrode to bottom electrode and the device resistivity is low as mobility increases. The ion mobility which determines electrical behavior of the device is dependent on the energy when implanting the dopants. Higher implanting energy causes lower ions density and leads to diversified ions distribution. Figure 3 shows ions density distribution versus different implanting energy.

Figure 2: Ion mobility and conduction formation process of the ReRAM device. (a) Initial state, data from ReRAM_00_log.str. (b) Set state, data from ReRAM_01_log.str. The conduction path is formed by applying a lower and longer pulse to obtain a low resistance.
Figure 3: Illustration of ions density distribution between top electrode and bottom electrode in the ReRAM device when implanting ions by different energy.

To obtain the I-V characteristics of the ReRAM device, we designed a simple contour model consisting of a current source which generates sinusoidal signals with frequency of 2 kHz, a virtual voltage source measuring the circuit current, and a rectifier resistance (1 kΩ) to keep the circuit stable. Our model gives the simulated I-V loop in Figures 4(b) and 4(c), compared with the experimental results in Figure 4(a). The loops describe the switching behavior of the device. When applying sweeping bias, the device begins with a high resistance, and as the voltage increases, the current slowly increases. As charge flows through the device, the resistance drops, and the current increases more rapidly with increasing voltage until the peak anode current is reached. Then, as the voltage decreases, the current decreases but more slowly, because charge is flowing through the device and the resistance is still dropping. The result is Lissajous-switching loop.

Figure 4: (a) Experimental test for ReRAM device. The test circuit contains a current source generating sinusoidal signals with frequency 2 kHz, a virtual voltage source measuring the circuit current, a rectifier resistance to keep the circuit stable, and a ReRAM cell to get the I-V characteristics. (b) Continuous simulated sinusoidal sweeping bias and the corresponding output current of the ReRAM device. (c) The simulated switching loop of the ReRAM device is traversed as figure-of-eight shape.
2.3. FPGA Switching Matrix

FPGA [1113] is popular for its ability to design any circuit conveniently by being appropriately programmed.

Using FPGA rather than implementing custom circuit technologies is much lower for consideration of engineering costs and much faster for developing. FPGA typically includes control circuit, switching matrix based on SRAM, configurable logic block (CLB), IO block, and programmable interresources (PI). The switching matrix occupies most of the die area, so we use SRAM cells as controller, use multiplexer and tristate buffers to configure the programmable routing and logic blocks. Therefore, SRAM is a significant area to be improved. Figure 5 illustrates the FPGA architecture, and the traditional SRAM cells switching matrix are replaced with ReRAM devices. ReRAM devices used in an FPGA strongly influence the FPGA speed, area efficiency, and power consumption, because of its simple structure and nonvolatile characteristic. ReRAM devices can store bits whenever the power is on or off; on the contrary, SRAM cannot store information when power is off and FPGA must fetch the configurable information from the outside ROM. Therefore it is much faster to use ReRAM cell in the switch matrix. Therefore, the ReRAM device is an important application as programmable switch used in FPGAs. We tested the logic function with the ReRAM-based FPGA and the test script is described as follows:Always @(posedge clk)for i = 0 to sizeif data signal is valid sum = sum + 1; data accumulationif sum is odd then the output signal is validelse the output signal is invalid

Figure 5: A generic FPGA consisted of CLB, IOB, and IR. The SRAM cells of FPGA switch matrix are replaced with ReRAM cells.

As shown in Figure 6, the test is comprised of clock, data control, and data input signals. The results suggest that logic function of the ReRAM-based FPGA is appropriate.

Figure 6: Logic function test for ReRAM-based FPGA. The test is comprised of clock, data control, and input data signals.

3. Conclusion

This paper presented the missing electric element ReRAM (known as memristor) and deduced the definition expression of this device, which is a fundamental nonlinear circuit element with the linkage of charge and magnetic flux. Furthermore, we explored the mechanism and put forward a model based on ion mobility for the ReRAM device. To validate the model of this device, we proposed using such device as a storage cell for the FPGA switch matrix. This application has more advantages than the traditional SRAM cells because it can store bits when the power is off, instead of reading configurable information when the system is initializing, due to its nonvolatile characteristics. Besides, there are many other applications of ReRAM to be investigated for the further work. Note that the ReRAM is a feasible material for manufacturing solid state storage devices, the electrical characteristics, read/write circuit, and data arrangement should be explored. And the memristor has the same tiny structural as the synapse, which gives implications to apply this device in artificial intelligence.

Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.

Acknowledgments

This work was all supported by the National Natural Science Foundation of China under Grant 61103143, the Basic and Frontier Project of Henan Science and Technology Department under Grant no. 142300410432, and the Soft Science Project of Henan Science and Technology Department under Grant no. 142400411058.

References

  1. K. Zhang, S. Long, Q. Liu et al., “Progress in rectifying-based RRAM passive crossbar array,” Science China Technological Sciences, vol. 54, no. 4, pp. 811–818, 2011. View at Publisher · View at Google Scholar · View at Scopus
  2. D.-H. Kwon, K. M. Kim, J. H. Jang et al., “Atomic structure of conducting nanofilaments in TiO2 resistive switching memory,” Nature Nanotechnology, vol. 5, no. 2, pp. 148–153, 2010. View at Publisher · View at Google Scholar · View at Scopus
  3. J. J. Yang, M. D. Pickett, X. Li, D. A. A. Ohlberg, D. R. Stewart, and R. S. Williams, “Memristive switching mechanism for metal/oxide/metal nanodevices,” Nature Nanotechnology, vol. 3, no. 11, pp. 429–433, 2008. View at Publisher · View at Google Scholar · View at Scopus
  4. E. Linn, R. Rosezin, C. Kügeler, and R. Waser, “Complementary resistive switches for passive nanocrossbar memories,” Nature Materials, vol. 9, no. 10, pp. 403–406, 2010. View at Publisher · View at Google Scholar · View at Scopus
  5. L. Chua and O. Leon, “Memristor—the missing circuit element,” IEEE Transactions on Circuit Theory, vol. 18, no. 5, pp. 507–519, 1971. View at Publisher · View at Google Scholar
  6. D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, “The missing memristor found,” Nature, vol. 453, no. 10, pp. 80–83, 2008. View at Google Scholar
  7. D. B. Strukov and R. S. Williams, “Exponential ionic drift: fast switching and low volatility of thin film memristors,” Applied Physics Letters, vol. 94, no. 3, pp. 515–519, 2009. View at Google Scholar
  8. S. H. Jo, T. Chang, I. Ebong, B. B. Bhadviya, P. Mazumder, and W. Lu, “Nanoscale memristor device as synapse in neuromorphic systems,” Nano Letters, vol. 10, no. 4, pp. 1297–1301, 2010. View at Publisher · View at Google Scholar · View at Scopus
  9. P. Sheridan, K.-H. Kim, S. Gaba, T. Chang, L. Chen, and W. Lu, “Device and SPICE modeling of RRAM devices,” Nanoscale, vol. 3, no. 9, pp. 3833–3840, 2011. View at Publisher · View at Google Scholar · View at Scopus
  10. Y. X. Deng, P. Huang, B. Chen et al., “RRAM crossbar array with cell selection device: a device and circuit interaction study,” IEEE Transactions on Electron Devices, vol. 60, no. 2, pp. 719–726, 2013. View at Publisher · View at Google Scholar · View at Scopus
  11. A. Ejnioui and N. Ranganathan, “Routing on field-programmable switch matrices,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 11, no. 2, pp. 283–287, 2003. View at Publisher · View at Google Scholar · View at Scopus
  12. J. Cong and B. Xiao, “FPGA-RPI: a novel fpga architecture with rram-based programmable interconnects,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 4, pp. 864–877, 2014. View at Publisher · View at Google Scholar · View at Scopus
  13. A. M. Smith, G. A. Constantinides, and P. Y. K. Cheung, “FPGA architecture optimization using geometric programming,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, no. 8, pp. 1163–1176, 2010. View at Publisher · View at Google Scholar · View at Scopus