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International Journal of Aerospace Engineering
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International Journal of Aerospace Engineering
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2018
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Article
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Tab 3
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Research Article
Architecture for Measuring Blade Tip Clearance and Time of Arrival with Multiple Sensors in Airplane Engines
Table 3
FPGA resources needed to implement one single TC and ToA processor.
Slice LUTs
Slice registers
Block RAM
DSP
I/O pins
Implementation
2268
3138
1
2
29