Architecture for Measuring Blade Tip Clearance and Time of Arrival with Multiple Sensors in Airplane Engines

Table 4

Utilization percentage of the available resources in different FPGA families.

FPGA family	FPGA model	Slice LUTs	Slice registers	Block RAM	DSP
ZYNQ	XC7Z010dg400	15.5%	8.9%	1.7%	2.5%
ARTIX-7	XC7A035tcgp236	13.1%	7.5%	2.0%	2.2%
KINTEX-7	XC7K070tfbg584	6.6%	0.4%	0.7%	0.8%
VIRTEX-7	XC7V585tffg1157	0.7%	0.4%	0.1%	0.1%