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Baseband Transceiver Design of a High Definition Radio FM System Using Joint Theoretical Analysis and FPGA Implementation
Advances in wireless communications have enabled various technologies for wireless digital communication. In the field of digital radio broadcasting, several specifications have been proposed, such as Eureka-147 and digital radio mondiale (DRM). These systems require a new spectrum assignment, which incurs heavy cost due to the depletion of the available spectrum. Therefore, the in-band on-channel (IBOC) system has been developed to work in the same band with the conventional analog radio and to provide digital broadcasting services. This paper discusses the function and algorithm of the high definition (HD) radio frequency modulation (FM) digital radio broadcasting system. Content includes data format allocation, constellation mapping, orthogonal frequency division multiplexing (OFDM) modulation of the transmitter, timing synchronization, OFDM demodulation, integer and fraction carrier frequency (integer carrier frequency offset (ICFO) and fractional CFO (FCFO)) estimation, and channel estimation of the receiver. When we implement this system to the field programmable gate array (FPGA) based on a hardware platform, both theoretical and practical aspects have been considered to accommodate the available hardware resources.
With advances in wireless communication, many schemes have been developed and are currently available. In the digital radio broadcasting area, several specifications are currently in use, for example, the Eureka-147 in Europe . This is known as digital audio broadcasting (DAB) [2–4] and has been adopted by many European countries; one of its early commercial adopters was the British Broadcasting Corporation (BBC), which went into digital broadcasting in 1995. This system utilizes the orthogonal frequency division multiplexing (OFDM) technology. Another digital radio broadcasting proposition is called digital radio mondiale (DRM), which was developed in France and is able to operate at frequencies below 30 MHz [3, 5]. Both of these digital radio broadcasting technologies require a new spectrum assignment for their proprietary use, which is costly due to limited spectrum availability. Therefore, an in-band on-channel (IBOC) system has been developed, and it allows the conventional radio and the digital signal to broadcast simultaneously in the same channel allocation [6–11].
IBOC has been adopted by the United States (US) as its digital radio broadcasting standard, including two sets of specifications: high definition (HD) radio frequency modulation (FM) and HD radio amplitude modulation (AM), both of which share identical working frequencies as conventional FM and AM spectrums [11–13]. The HD radio FM system is a digital radio broadcasting system developed by the iBiquity Digital Corporation, and it can simultaneously broadcast analog and digital audio signals in the same FM spectrum. The benefit of adopting this system is that the listeners who have digital receivers can receive compact disk- (CD-) like quality programs, and those with the conventional receivers can still receive the same analog programs.
This system specifies two broadcasting modes: the hybrid mode and the all-digital mode. A station occupies 400 kHz bandwidth to transmit in parallel its analog and digital signals to the hybrid mode; meanwhile it can utilize the whole 400 kHz bandwidth to transmit the pure digital signal in the all-digital mode . As this system restrains itself from the analog FM station spectrum allocation, it has less bandwidth to transmit the digital signal to the hybrid mode, which is 140–200 kHz. In the future, as soon as broadcasting is transferred to full digital, the all-digital mode will be applied instead. In this mode, the HD radio FM system utilizes the complete 400 kHz bandwidth in digital transmission, even though it occupies less bandwidth than other digital radio broadcasting standards do. Since the located spectrum is the same as the conventional analog FM, the broadcast station does not need to drastically change its equipment, and the listeners do not need to adjust to the new station allocation frequency. Due to the spectrum attribution, this system is very suitable for a limited spectrum environment.
The structure of this paper is as follows. Section 2 describes the transmitter design based on the system specifications. Section 3 specifies the receiver design and discusses the algorithms of each receiver module, including its specific function and the simulation results. Section 4 presents the implementation of the system to the FPGA hardware platform. Finally, the conclusion is given in Section 5.
2. Transmitter Design
2.1. HD Radio FM System Parameters
The technical document released by iBiquity details the specification of the HD radio FM. The subcarrier spacing is 363.4 Hz, the cyclic prefix (CP) width is 7/128, and the FFT size is 4096. These three parameters result in the OFDM symbol duration of 2.902 ms. In the 400 kHz bandwidth assigned to each station, the central 200 kHz is for analog use only, while the other two remaining sidebands of total 200 kHz are for digital use. The spectrum allocation is shown in Figure 1. The digital signal occupies up to 534 subcarriers. In this paper, the spectrum distribution is compatible with the hybrid mode 1 described by the Spec.. There are 10 frequency partitions on each sideband of the digital FM. Each partition consists of 19 OFDM subcarriers, with the combination of 1 reference subcarrier for control/synchronization and the remaining 18 subcarriers for digital audio transmission. Each frame lasts for 1.486 seconds, which consists of 16 blocks and 32 OFDM symbols per block. In addition, the OFDM symbol duration and the CP length are also specified in the Spec. as 2.902 milliseconds and 7/128, respectively.
2.2. Transmitter Design
In this subsection, the transmitted block structure defined in the Spec. will be introduced. The physical layer architecture of the HD Radio FM system is shown in Figure 2. The data stream at first enters the scrambling block, which randomizes the digital data in each logical channel. Afterward, the scrambled data is encoded by using the convolutional code to add redundancy to the digital data in each logical channel. Later, the channel encoded bits are interleaved in the time and frequency domains to mitigate the effects of burst errors.
The HD radio FM system utilizes quadrature phase shift keying (QPSK) mapping in the data subcarriers and BPSK mapping in the reference subcarriers. OFDM subcarrier mapping converts the interleaved data to the frequency domain. Pairs of adjacent columns within an interleaver partition are mapped to individual complex, QPSK-modulated data subcarriers in the frequency partition. The transmission subsystem formats the baseband IBOC FM waveform for transmission through the very high frequency (VHF) channel. The concatenation functions include symbol concatenation and frequency upconversion. The concatenation functions are executed in the IFFT block. In this block, frequency domain data is transformed to time domain, and the transformed data is concatenated into OFDM symbols. Afterward, CP is added to the OFDM symbols. The frequency upconversion is executed in the upconversion block after the CP block. When transmitting the hybrid or extended hybrid waveforms, this function modulates the baseband analog signal before combining it with the digital waveforms. Figure 3 shows the hybrid transmission subsystem block diagram. The input to this module is a complex, baseband, time-domain OFDM signal, . After implementing the diversity delay , the baseband analog signal is input from an analog source. is adjustable to account for the processing delays between the analog and the digital chains. In the IBOC system, the analog and digital signals carry the same audio program.
The analog signal is transmitted by the conventional FM modulation; that is, where denotes the FM carrier frequency, , and kHz is the maximum frequency deviation. The FM radio frequency (RF) signal is then combined with the digitally modulated RF OFDM signal, which passes through upconversion producing the IBCO FM hybrid waveform, .
3. Receiver Design
3.1. Signal Synchronization
The CP delay correlation is designed in this system to detect the symbolic timing offset (STO) and the fractional carrier frequency offset (FCFO) [8, 15]. The ICFO can be solved by using the control data placed in the reference subcarrier. Since the HD radio FM system adopts the OFDM modulation technique, the CP of the OFDM symbol allows the receiver to utilize the periodic feature of signals to estimate the starting point of one symbol. The algorithm is shown in where is the received complex signal, is the complex conjugate, is the cyclic prefix length, is the summation correction, is energy correction, is the signal energy, and is the noise energy.
The peak value in the autocorrelation indicates that the starting point of the OFDM is a symbol with the high autocorrelation feature in one symbol. Correction functions must be added to compensate for the influence induced by the multipath channel. Nevertheless, it is still difficult to distinguish the peak value from the surrounding noises, such as AWGN noise. AWGN noise is a basic noise model that presents random noise in nature. Except for AWGN, the simulation channels considered in this paper are shown in Table 1 and the frequency responses of CM1 to CM4 are shown in Figures 5 to 8, respectively. Thus, we might suggest that averaging the cumulative autocorrelation values of one symbol length is applied to increase the decision reliability.
There are two main sources of the CFO. First, the relative speed between the transmitter and the receiver results in the Doppler shift. The second source is the mismatch between the oscillator of the transmitter and that of the receiver. The working carrier frequency of the HD radio FM can reach as high as 108 MHz. The channel model defined in  specifies that the receiver is moving at the speed of 141 km/h, resulting in 13 Hz of Doppler shift. This value is still less than half of the subcarrier spacing. According to the System Transmission Spec. , the mismatch of broadcasting stations, that is, the local oscillator (LO) mismatch, is limited to less than 1 ppm. Thus, the LO mismatch of the receiver is the main concern of the CFO issue. Therefore, the following discussion mainly focuses on the LO mismatch. Assume that the LO mismatch is 20 ppm and the carrier frequency is 108 MHz, the CFO can reach to 2160 Hz. As a result, the ICFO can cover up to 6 types of subcarrier spacing.
As discussed above, the CFO which affects this system can be divided into the FCFO and the ICFO. When a CFO is greater than a half of subcarrier spacing, it is customary to express it as an ICFO plus/minus an FCFO. The FCFO can be estimated via the CP delay correlation method mentioned previously, as shown in
As for the ICFO, it can be resolved by using the evenly spacing reference subcarriers in the frequency domain. According to the Spec., the length of the system control data sequence is 32 bits, and each time 1 bit is transmitted in one OFDM symbol at a time. In this sequence, there exists an 11-bit synchronization pattern which is designed for the purpose of frame synchronization.
Based on this property, the receiver is able to cross-correlate the received subcarriers to the 11-bit synchronized pattern upon receiving the OFDM signal. If a highly correlated subcarrier combination in each 19 subcarriers apart is found, then the position of the reference subcarrier is reached and the ICFO is acquired. The frame and synchronization methodology is shown in Figure 4. In Figure 4, the allocation of the 11-bit synchronization pattern is displayed in frequency domain. The 11-bit synchronization pattern is used to search and locate the ICFO.
3.2. Channel Estimation
In designing the receiver, attention should be paid to the timing/frequency synchronization as well as the channel effects. In the receiver, these harmful effects should be estimated and compensated. The pilot signals, which are located in the reference subcarriers, can be used in the channel estimation. In each transmission, all subcarriers except for bit 20 and bit 21 are transmitted as the same data in one OFDM symbol. These two bits are transmitted in a predefined order. Upon receiving these two signals, the system control data sequence can be decoded correctly by using the signals’ redundancy feature. The decoded signal is then used as the known pilot signal to assist the channel estimation. The channel response of each reference subcarriers is estimated by using the least squares (LS) channel estimation method. Consequently, the channel response of each data subcarrier is estimated by using the linear interpolation, as shown in (4) and (5). Equation (4) explains the approach of using the transmitted pilot signals and the received ones to search for the frequency response of the communication channel. Equation (5) is to use the result of (4) to perform the interpolation of the extra subcarriers where is the received pilot signal at the th pilot subcarrier. is the transmitted pilot signal at the th pilot subcarrier. is the number of pilot subcarriers. Consider where is the frequency response of the channel at pilot subcarriers. is the number of carriers.
The FM band channel model proposed by Electronics Industries Association (EIA) in 1993  is used in the simulations of the proposed channel estimation method. This method can be conducted to reach the bit error rate of 10−4 when the convolution code and the interleaver are applied, as shown in the simulation charts below. The response characteristics of all of the four channel models are listed in Table 1. The four figures (Figures 5, 6, 7, and 8) correspond to the frequency responses of CM1~CM4 in Table 1, respectively.
The robustness of different coding schemes under these channel models is shown in Figure 9.
Note that a convolutional code with the code rate 2/5 is implemented in this system. Besides, a three-element sliding window is applied to execute the averaging operation. That is, the final outcome of each symbol in each subcarrier is the weighted sum of the current symbol and the two most adjacent ones, as shown in Figure 9. When averaging is incorporated with the channel estimation, system performance will be modified. The main reason for this improvement is that more pilot data are used to estimate the corresponding channel response. The averaging process used in this paper is shown in Figure 10.
4. Implementation of the FPGA Hardware Platform
After careful examination of the parameters defined in the Spec. and the available hardware resources, the following parameters are chosen in the hardware implementation: FFT size: 2048, CP length: 112, sampling rate: 781.25 kHz, subcarrier spacing: 381.5 Hz, symbol rate: 361.9 Hz, transmission rate: 104.2 kbps (code rate 2/5).
The built-in CP2102 USB-UART bridging chip on the FPGA board is used as the communication interface between the board and the computer, as shown in Figure 11. The first FPGA board is linked to the other FPGA board through the USB transmission interface.
4.1. Constellation Mapping
The Agilent 89600 vector signal analyzer is used to monitor the QPSK constellation map generated by the transmitter, as shown in Figure 12. It can be seen that all the constellation points are mapped into the four corresponding clusters of QPSK.
4.2. The Transmitter Spectrum Diagram
The OFDM waveforms generated by the transmitter are fed into the Agilent 89600 vector signal analyzer to analyze its spectrum map. The result is shown in Figure 13. The simulation frequency map generated by MATLAB is shown in Figure 14. It is found that these two spectrum distributions are basically similar.
4.3. Receiver Signal Synchronization
This system utilizes the OFDM technology to achieve symbol synchronization through the autocorrelation property. First, upon receiving the signal, it uses a FIFO memory to temporarily store the signal so as to extract the two sampling points of the intervals OFDM length of symbol for autocorrelation calculations. This autocorrelation calculation value will be stored in another FIFO memory having the CP length in order to sum up the entire CP length actions. The summed value will be stored in another FIFO memory having the length of an entire OFDM length of symbol, adding this to the autocorrelated value having the length of a symbol. The position of the largest value in the memory storage will be the standard time for time synchronization, which is then fed into the FFT. The flow chart is shown in Figure 15.
4.4. Channel Estimation Circuit Design
The channel estimation scheme contains two main steps. The first one is to detect the channel response of the subcarrier, while the second one is the division of complex numbers signals needed to be processed in this area. Through (6), the hardware can be implemented through the addition tool and the real number division tool. Consider
After that, the channel response will be estimated. This step is derived by interpolation from the preamble. The circuit of this matter is shown in Figure 16. The FPGA implementation provides a prototype baseband system which is compatible with the HD radio FM specifications. The synthesis software ISE 9.1.03i is used to synthesize the transmitter and the receiver. The synthesized gate count of the transmitter is about 1,938,975, while the highest operation clock is 96.375 MHz; the synthesized gate count of the receiver is about 1,788,016, while the highest operation clock is 81.264 MHz.
In this paper, the HD radio FM structure and algorithms of their transmitter and receiver are presented. The transmitter design is fully complied with the HD radio FM specification. In the receiver algorithms, the timing and frequency synchronization issues are studied and discussed. As for the channel impairments, a channel estimation and compensation algorithm is presented and performed in different channel models. From the simulation results, it can be seen that the system performance still maintains in a descent range under various channel environments. A hardware prototype system is realized on FPGA and a PC platform. The system is capable of processing signals at a fast pace due to the nature of FPGA and also adding flexibility for the future algorithm configuration.
Conflict of Interests
The authors declare that there is no conflict of interests regarding the publication of this paper.
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