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International Journal of Antennas and Propagation
Volume 2015, Article ID 470952, 14 pages
http://dx.doi.org/10.1155/2015/470952
Research Article

Modeling and Electromagnetic Analysis of Multilayer Through Silicon Via Interconnect for 3D Integration

School of Electronic and Information Engineering, Beihang University, No. 37 Xueyuan Road, Haidian District, Beijing 100191, China

Received 24 July 2015; Revised 3 November 2015; Accepted 4 November 2015

Academic Editor: Felipe Cátedra

Copyright © 2015 Zhaowen Yan et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Linked References

  1. G. Katti, M. Stucchi, K. De Meyer, and W. Dehaene, “Electrical modeling and characterization of through silicon via for three-dimensional ICs,” IEEE Transactions on Electron Devices, vol. 57, no. 1, pp. 256–262, 2010. View at Publisher · View at Google Scholar · View at Scopus
  2. J. Kim, J. S. Pak, J. Cho et al., “High-frequency scalable electrical model and analysis of a through silicon via (TSV),” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 1, no. 2, pp. 181–195, 2011. View at Publisher · View at Google Scholar · View at Scopus
  3. D. H. Kim, S. Mukhopadhyay, and S. K. Lim, “Fast and accurate analytical modeling of through-silicon-via capacitive coupling,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 1, no. 2, pp. 168–180, 2011. View at Publisher · View at Google Scholar · View at Scopus
  4. K. J. Han, M. Swaminathan, and J. Jeong, “Modeling of through-silicon via (TSV) interposer considering depletion capacitance and substrate layer thickness effects,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 5, no. 1, pp. 108–118, 2015. View at Publisher · View at Google Scholar · View at Scopus
  5. C. Liu, T. Song, J. Cho, J. Kim, J. Kim, and S. K. Lim, “Full-chip TSV-to-TSV coupling analysis and optimization in 3D IC,” in Proceedings of the 48th ACM/EDAC/IEEE Design Automation Conference (DAC '11), pp. 783–788, New York, NY, USA, June 2011. View at Scopus
  6. A. E. Engin and S. R. Narasimhan, “Modeling of crosstalk in through silicon vias,” IEEE Transactions on Electromagnetic Compatibility, vol. 55, no. 1, pp. 149–158, 2013. View at Publisher · View at Google Scholar · View at Scopus
  7. W. Yao, S. Pan, B. Achkir, J. Fan, and L. He, “Modeling and application of multi-port TSV networks in 3-D IC,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, no. 4, pp. 487–496, 2013. View at Publisher · View at Google Scholar · View at Scopus
  8. R. Cecchetti, S. Piersanti, F. de Paulis, A. Orlandi, and J. Fan, “Analytical evaluation of scattering parameters for equivalent circuit of through silicon via array,” Electronics Letters, vol. 51, no. 13, pp. 1025–1027, 2015. View at Publisher · View at Google Scholar
  9. T. Bandyopadhyay, K. J. Han, D. Chung et al., “Rigorous electrical modeling of through silicon vias (TSVs) with MOS capacitance effects,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 1, no. 6, pp. 893–903, 2011. View at Publisher · View at Google Scholar
  10. H. Kim, J. Cho, M. Kim et al., “Measurement and analysis of a high-speed TSV channel,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 2, no. 10, pp. 1672–1685, 2012. View at Publisher · View at Google Scholar · View at Scopus
  11. J. Kim, J. Cho, J. Kim et al., “High-frequency scalable modeling and analysis of a differential signal through-silicon via,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 4, no. 4, pp. 697–707, 2014. View at Publisher · View at Google Scholar
  12. B. S. Guru and H. R. Hiziroglu, Electromagnetic Field Theory Fundamentals, Cambridge University Press, 2004. View at Publisher · View at Google Scholar
  13. I. Ndip, K. Zoschke, K. Löbbicke et al., “Analytical, numerical-, and measurement—based methods for extracting the electrical parameters of through silicon vias (TSVs),” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 4, no. 3, pp. 504–515, 2014. View at Publisher · View at Google Scholar · View at Scopus
  14. M. Kawano, N. Takahashi, Y. Kurita, K. Soejima, M. Komuro, and S. Matsui, “Three-dimensional packaging technology for stacked DRAM with 3-Gb/s data transfer,” IEEE Transactions on Electron Devices, vol. 55, no. 7, pp. 1614–1620, 2008. View at Publisher · View at Google Scholar · View at Scopus
  15. Z. Xu, A. Beece, D. Zhang et al., “Crosstalk evaluation, suppression and modeling in 3D through-strata-via (TSV) network,” in Proceedings of the 2nd IEEE International 3D Systems Integration Conference (3DIC '10), pp. 1–8, IEEE, Munich, Germany, November 2010. View at Publisher · View at Google Scholar · View at Scopus