MIMO Fading Emulator Development with FPGA and Its Application to Performance Evaluation of Mobile Radio Systems

Table 2

MIMO FE system specifications.

FPGA IC	XILINX Virtex 6 LX240T
Baseboard	XILINX ML605
Input/output
ADC	4DSP FMC104 (14 bit)
DAC	4DSP FMC204 (16 bit)
Input ports	4
Output ports	4
Signal processing
Clock frequency	160 MHz
IF frequency	40 MHz
Bandwidth	40 MHz (max)
Propagation parameters
Probe antennas	32
Delay paths	8
Maximum delay	50 μs ( = 1–6), 200 μs ()
Delay resolution	6.25 ns ( = 160 MHz)
Doppler frequency	0.1 Hz~10 kHz