Analysis, Optimization, and Hardware Implementation of Dipole Antenna Array for Wireless Applications

<div>Output phase, <i>ø</i><sub><i>p,</i></sub> of each channel when <i>V</i><sub><i>aq</i></sub> varies from 0 to 8 V and <i>V</i><sub><i>pp</i></sub> is kept constant.</div>

International Journal of Antennas and Propagation

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Figure 18

Figure 18: Analysis, Optimization, and Hardware Implementation of Dipole Antenna Array for Wireless Applications 