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International Journal of Reconfigurable Computing
Volume 2008 (2008), Article ID 180216, 14 pages
http://dx.doi.org/10.1155/2008/180216
Research Article

An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture

Graduate School of Science and Technology, Kumamoto University, 2-39-1 Kurokami, Kumamoto 860-8555, Japan

Received 1 March 2008; Revised 15 May 2008; Accepted 21 August 2008

Academic Editor: Philip Leong

Copyright © 2008 Motoki Amagasaki et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Motoki Amagasaki, Ryoichi Yamaguchi, Masahiro Koga, Masahiro Iida, and Toshinori Sueyoshi, “An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture,” International Journal of Reconfigurable Computing, vol. 2008, Article ID 180216, 14 pages, 2008. doi:10.1155/2008/180216