On the Power Dissipation of Embedded Memory Blocks Used to Implement Logic in Field-Programmable Gate Arrays

Table 2

Summary of experiments for evaluating enhanced algorithm.

(a) 𝐵=512

Experiment	Logical size	𝑁
Baseline	512	2	4	6	8
BF = 2	1024	1	2	3	4
BF = 4	2048	—	1	—	2
BF = 8	4096	—	—	—	1

(b) 𝐵=4096

Experiment	Logical size	𝑁
Baseline	4096	2	4	6	8
BF = 2	8192	1	2	3	4
BF = 4	16384	—	1	—	2
BF = 8	32768	—	—	—	1