Architecture-Level Exploration of Alternative Interconnection Schemes Targeting 3D FPGAs: A Software-Supported Methodology

<table>Variation on interconnection length for (a) 
						a 2D device, (b) a 3D architecture with two layers, and (c) 
						a 3D architecture with four layers.</table>

International Journal of Reconfigurable Computing

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Figure 1

Figure 1: Architecture-Level Exploration of Alternative Interconnection Schemes Targeting 3D FPGAs: A Software-Supported Methodology 