A Decentralised Task Mapping Approach for Homogeneous Multiprocessor Network-On-Chips

<table class="table-group" width="800px"><tr class="fig-image" id="a"><td><img alt="453970.fig.008a" src="https://static.hindawi.com/articles/ijrc/volume-2009/453970/figures/453970.fig.008a.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(a) </b>Task graph 2</td></tr></table></td></tr><tr class="fig-image" id="b"><td><img alt="453970.fig.008b" src="https://static.hindawi.com/articles/ijrc/volume-2009/453970/figures/453970.fig.008b.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(b) </b>Processor graph</td></tr></table></td></tr></table>

<table>Modelling example for an application and NoC processor array.</table>

International Journal of Reconfigurable Computing

fig8

Figure 8

Figure 8: A Decentralised Task Mapping Approach for Homogeneous Multiprocessor Network-On-Chips 