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International Journal of Reconfigurable Computing
Volume 2009, Article ID 514754, 9 pages
http://dx.doi.org/10.1155/2009/514754
Research Article

Speeding Up FPGA Placement via Partitioning and Multithreading

Electrical and Computer Engineering, North Dakota State University, Fargo, ND 58108-6050, USA

Received 5 June 2009; Revised 15 October 2009; Accepted 12 November 2009

Academic Editor: Marco Platzner

Copyright © 2009 Cristinel Ababei. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Cristinel Ababei, “Speeding Up FPGA Placement via Partitioning and Multithreading,” International Journal of Reconfigurable Computing, vol. 2009, Article ID 514754, 9 pages, 2009. https://doi.org/10.1155/2009/514754.